T9000
Preliminary Data Sheet
November 2000
ISDN Network Termination Node (NTN) Device
11 GPIO Ports (continued)
11.1 GPIO Register Set (continued)
Table 96. GPD1: GPIO Port 1 Data Register (0x3E)
Reg
R/W
Bit 7
GPD1.7
0
Bit 6
GPD1.6
0
Bit 5
GPD1.5
0
Bit 4
GPD1.4
0
Bit 3
GPD1.3
0
Bit 2
GPD1.2
0
Bit 1
GPD1.1
0
Bit 0
GPD1.0
0
GPD1
R/W
RESET Default
Bit #
Symbol
Name/Description
7—0
GPD1.[7:0]
I/O Data on GPIO Port 1.
Table 97. GPD2: GPIO Port 2 Data Register (0x3F)
Reg
R/W
Bit 7
GPD2.7
0
Bit 6
GPD2.6
0
Bit 5
GPD2.5
0
Bit 4
GPD2.4
0
Bit 3
GPD2.3
0
Bit 2
GPD2.2
0
Bit 1
GPD2.1
0
Bit 0
GPD2.0
0
GPD2
R/W
RESET Default
Bit #
Symbol
Name/Description
7—0 GPD2.[7:0] I/O Data on GPIO Port 2.
Table 98. GPLEI: GPIO Level-Edge-Triggered Interrupt Control (0x40)
Reg
R/W
Bit 7
ILE1.3
1
Bit 6
ILE1.2
1
Bit 5
ILE1.1
1
Bit 4
ILE1.0
1
Bit 3
ILE0.3
1
Bit 2
ILE0.2
1
Bit 1
ILE0.1
1
Bit 0
ILE0.0
1
GPLEI
R/W
RESET Default
Bit #
Symbol
Name/Description
7—4
ILE1.[3:0]
Level/Edge Interrupt Control for GPIO1.[3:0]. Only applicable when pin is in input
mode (see register GPDIR1). ILE1.x defines the interrupt mechanism for GPIO1.x pin.
0: Level-triggered.
1: Edge-triggered.
3—0
ILE0.[3:0]
Level/Transition Interrupt Control for GPIO0.[3:0]. Only applicable when pin is in input
mode (see register GPDIR0). ILE0.x defines the interrupt mechanism for GPIO0.x.
0: Level-triggered.
1: Edge-triggered.
90
Lucent Technologies Inc.
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