Data Sheet
June 1999
ORCA Series 3C and 3T FPGAs
Programmable Logic Cells (continued)
D
Q
REGCOUT
COUT
C
C
In the third submode, multiplier submode, a single
PFU can affect an 8 x 1 bit (4 x 1 for half-ripple mode)
multiply and sum with a partial product (see Figure 8).
The multiplier bit is input at ASWE, and the multiplicand
bits are input at KZ[1], where K7[1] is the most signifi-
cant bit (MSB). KZ[0] contains the partial product (or
other input to be summed) from a previous stage. If
ASWE is logical 1, the multiplicand is added to the par-
tial product. If ASWE is logical 0, 0 is added to the par-
tial product, which is the same as passing the partial
product. CIN/FCIN can bring the carry-in from the less
significant PFUs if the multiplicand is wider than 8 bits,
and COUT/FCOUT holds any carry-out from the multi-
plication, which may then be used as part of the prod-
uct or routed to another PFU in multiplier mode for
multiplicand width expansion.
ASWE
K7[1]
F7
1
0
0
0
0
0
0
0
0
0
D
D
D
D
D
D
D
D
+
+
+
+
+
+
+
+
Q
Q
Q
Q
Q
Q
Q
Q
Q7
K7[0]
K6[1]
K7
K6
K5
K4
K3
K2
K1
K0
F6
1
0
Q6
K6[0]
K5[1]
1
0
F5
Q5
K5[0]
K4[1]
F4
1
0
Q4
K4[0]
K3[1]
1
0
F3
Q3
K3[0]
K2[1]
F2
1
0
Ripple mode’s fourth submode features equality
comparators. The functions that are explicitly available
are A > B, A ≠ B, and A < B, where the value for A is
input on KZ[0], and the value for B is input on KZ[1]. A
value of 1 on the carry-out signals valid argument. For
example, a carry-out equal to 1 in AB submode indi-
cates that the value on KZ[0] is greater than or equal to
the value on KZ[1]. Conversely, the functions A < B, A +
B, and A > B are available using the same functions but
with a 0 output expected. For example, A > B with a 0
output indicates A < B. Table 5 shows each function
and the output expected.
Q2
K2[0]
K1[1]
F1
1
0
Q1
K1[0]
K0[1]
F0
1
0
Q0
K0[0]
5-5757(F)
Key: C = configuration data.
Figure 8. Multiplier Submode
If larger than 8 bits, the carry-out signal can be cas-
caded using fast-carry logic to the carry-in of any adja-
cent PFU. The use of this submode could be shown
using Figure 6, except that the CIN/FCIN input for the
least significant PFU is controlled via configuration.
Table 5. Ripple Mode Equality Comparator
Functions and Outputs
Equality
Function
ORCA Foundry
Submode
True, if
Carry-Out Is:
A > B
A < B
A ≠ B
A < B
A > B
A = B
A > B
A < B
A ≠ B
A > B
A < B
A ≠ B
1
1
1
0
0
0
18
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