ADXL36±
Data Sheet
APPLICATIONS INFORMATION
APPLICATION EXAMPLES
Startup Routine
This routine assumes a 2 g measurement range and operation
in wake-up mode.
This section includes a few application circuits, highlighting
useful features of the ADXL362.
1. Write 250 decimal (0xFA) to Register 0x20, and write 0 to
Register 0x21: sets activity threshold to 250 mg.
2. Write 150 decimal (0x96) to Register 0x23, and write 0 to
Register 0x24: sets inactivity threshold to 150 mg.
3. Write 30 decimal (0x1E) to Register 0x25: sets inactivity
timer to 30 samples or about 5 seconds.
4. Write 0x3F to Register 0x27: configures motion detection in
loop mode and enables referenced activity and inactivity
detection.
5. Write 0x40 to Register 0x2B: map the AWAKE bit to INT2.
The INT2 pin is tied to the gate of the switch.
6. Write 0x0A to Register 0x2D: begins the measurement in
wake-up mode.
Device Configuration
This section outlines the procedure for configuring the device
and acquiring data. In general, the procedure follows the sequence
of the register map, starting with Register 0x20, THRESH_ACT_L.
1. Set activity and inactivity thresholds and timers.
a. Write to Register 0x20 to Register 0x26.
b. To minimize false positive motion triggers, set the
TIME_ACT register greater than 1.
2. Configure activity and inactivity functions.
a. Write to Register 0x27.
3. Configure FIFO.
a. Write to Register 0x28 and Register 0x29.
4. Map interrupts.
Using External Timing Triggers
a. Write to Register 0x2A and Register 0x2B.
5. Configure general device settings.
a. Write to Register 0x2C.
Figure 44 shows an application diagram for using the INT1 pin
as the input for an external clock. In this mode, the external
clock determines all accelerometer timing, including the output
data rate and bandwidth.
6. Turn measurement on.
a. Write to Register 0x2D.
To enable this feature, at the end of the desired start-up routine,
set Bit 6 in the POWER_CTL register; for example, write 0x42
to this register to enable the use of an external clock and place
the accelerometer into measurement mode.
Settings for each of the registers vary based on application
requirements. For more information, see the Register Details
section.
Autonomous Motion Switch
V
V
S
DD I/O
The features of the ADXL362 make it ideal for use as an
autonomous motion switch. The example outlined here
implements a switch that, once configured, operates without the
intervention of a host processor to intelligently manage system
power. In this example, the awake signal, mapped to the INT2
pin, drives a high-side power switch, such as the ADP195, to
control power to the downstream circuitry.
C
C
IO
S
V
V
S
DD I/O
ADXL362
MOSI
MISO
SCLK
CS
EXTERNAL
CLOCK
INT1
INT2
SPI
INTERFACE
INTERRUPT
CONTROL
GND
V
V
S
DD I/O
Figure 44. INT1 Pin as the Input for the External Clock
C
C
IO
S
Figure 45 is an application diagram for using the INT2 pin as a
trigger for synchronized sampling. Acceleration samples are
produced every time this trigger is activated. To enable this
feature, near the end of the desired start-up routine, set Bit 3 in
the FILTER_CTL register; for example, write 0x4B to this register
to enable the trigger and configure the accelerometer for 8 g
measurement range and 100 Hz ODR.
V
V
S
DD I/O
ADXL362
MOSI
INTERRUPT
CONTROL
MISO
SCLK
CS
INT1
INT2
SPI
INTERFACE
GND
AWAKE
V
V
S
DD I/O
REVERSE
POLARITY
ADP195
C
C
IO
S
PROTECTION
VOUT
LOAD
VIN
VS
V
V
GND
S
DD I/O
ADXL362
MOSI
LEVEL SHIFT
AND SLEW
RATE CONTROL
INTERRUPT
CONTROL
EN
MISO
SCLK
CS
INT1
INT2
SPI
INTERFACE
SAMPLING
TRIGGER
GND
Figure 43. Awake Signal to Control Power to Downstream Circuitry
Figure 45. Using the INT2 Pin to Trigger Synchronized Sampling
Rev. B | Page 36 of 44
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