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EVAL-AD5570EB 参数 Datasheet PDF下载

EVAL-AD5570EB图片预览
型号: EVAL-AD5570EB
PDF下载: 下载PDF文件 查看货源
内容描述: 真正的精度, 16位12 V / 15 V ,串行输入电压输出DAC [True Accuracy, 16-Bit 12 V/15 V, Serial Input Voltage Output DAC]
分类和应用:
文件页数/大小: 24 页 / 1039 K
品牌: ADI [ ADI ]
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AD±±70  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
V
1
2
3
4
5
6
7
8
16 REFGND  
15 REFIN  
SS  
V
DD  
CLR  
LDAC  
SYNC  
SCLK  
SDIN  
SDO  
14 REFGND  
AD5570  
13  
V
OUT  
TOP VIEW  
12 AGNDS  
11 AGND  
10 PD  
(Not to Scale)  
9
DGND  
Figure 5. 16-Lead SSOP Pin Configuration (RS-16)  
Table 5. Pin Function Descriptions  
Pin No. Mnemonic Description  
1
2
3
VSS  
VDD  
CLR  
Negative Analog Supply Voltage. −12 V ± 5% to −15 V ± 10% for specified performance.  
Positive Analog Supply Voltage. 12 V ± 5% to 15 V ± 10% for specified performance.  
Level Sensitive, Active Low Input. A falling edge of CLR resets VOUT to AGND. The contents of the registers are  
untouched.  
4
5
LDAC  
SYNC  
Active Low Control Input. Transfers the contents of the input register to the DAC register. LDAC may be tied  
permanently low, enabling the outputs to be updated on the rising edge of SYNC.  
Active Low Control Input. This is the frame synchronization signal for the data. When SYNC goes low, it powers  
on the SCLK and SDIN buffers and enables the input shift register. Data is transferred in on the falling edges of  
the following 16 clocks.  
6
±
SCLK  
SDIN  
SDO  
Serial Clock Input. Data is clocked into the input register on the falling edge of the serial clock input. Data can  
be transferred at rates of up to ꢁ MHz.  
Serial Data Input. This device has a 16-bit register. Data is clocked into the register on the falling edge of the  
serial clock input.  
Serial Data Output. Can be used for daisy chaining a number of devices together or for reading back the data in  
the shift register for diagnostic purposes. This is an open-drain outputꢂ it should be pulled to logic high with an  
external pull-up resistor of ~5 kΩ.  
DGND  
PD  
Digital Ground. Ground reference for all digital circuitry.  
Active Low Control Input. Allows the DAC to be put into a power-down state.  
Analog Ground. Ground reference for all analog circuitry.  
Analog Ground Sense. This is normally tied to AGND.  
Analog Output Voltage.  
This pin should be tied to 0 V.  
Voltage Reference Input. This is internally buffered before being applied to the DAC. For bipolar ±10 V output  
range, REFIN is 5 V.  
10  
11  
12  
13  
14  
15  
AGND  
AGNDS  
VOUT  
REFGND  
REFIN  
16  
REFGND  
This pin should be tied to 0 V.  
Rev. 0 | Page ꢀ of 24  
 
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