DAC8562–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(@ VDD = +5.0 ؎ 5%, RS = No Load, –40؇C ≤ TA ≤ +85؇C, unless otherwise noted)
Parameter
Symbol Condition
Min
Typ
Max
Units
STATIC PERFORMANCE
Resolution
N
Note 2
12
Bits
Relative Accuracy
INL
E Grade
F Grade
No Missing Codes
Data = 000H3
Data - FFFH
E Grade
–1/2
–1
–1
±1/4
±3/4
±3/4
+1/2
+1/2
+1
+1
LSB
LSB
LSB
LSB
Differential Nonlinearity
Zero-Scale Error
Full-Scale Voltage
DNL
VZSE
VFS
+3
4.087
4.079
4.095
4.095
±16
4.103
4.111
V
V
F Grade
Notes 3, 4
Full-Scale Tempco
TCVFS
ppm/°C
ANALOG OUTPUT
Output Current
Load Regulation at Half Scale
Capacitive Load
IOUT
LDREG
CL
Data = 800H
±5
±7
1
500
mA
LSB
pF
RL = 402 Ω to ∞, Data = 800H
3
No Oscillation4
REFERENCE OUTPUT
Output Voltage
Output Source Current
Line Rejection
VREF
IREF
LNREJ
LDREG
2.484
5
2.500
7
2.516
V
mA
%/V
%/mA
Note 5
0.08
0.1
Load Regulation
IREF = 0 to 5 mA
LOGIC INPUTS
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
VIL
VIH
IIL
0.8
V
V
µA
pF
2.4
10
10
CIL
Note 4
INTERFACE TIMING SPECIFICATIONS1, 4
Chip Enable Pulse Width
Data Setup
Data Hold
Clear Pulse Width
tCEW
tDS
tDH
30
30
10
20
ns
ns
ns
ns
tCLRW
AC CHARACTERISTICS4
Voltage Output Settling Time6
Digital Feedthrough
tS
To ±1 LSB of Final Value
16
35
µs
nV sec
SUPPLY CHARACTERISTICS
Positive Supply Current
IDD
VIH = 2.4 V, VIL = 0.8 V
3
6
mA
V
IL = 0 V, VDD = +5 V
VIH = 2.4 V, VIL = 0.8 V
IL = 0 V, VDD = +5V
∆VDD = ±5%
0.6
15
3
1
30
5
mA
Power Dissipation
PDISS
PSS
mW
mW
%/%
V
Power Supply Sensitivity
0.002
0.004
NOTES
1All input control signals are specified with tr = tf = 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
21 LSB = 1 mV for 0 to +4.095 V output range.
3Includes internal voltage reference error.
4These parameters are guaranteed by design and not subject to production testing.
5Very little sink current is available at the REFOUT pin. Use external buffer if setting up a virtual ground.
6The settling time specification does not apply for negative going transitions within the last 6 LSBs of ground. Some devices exhibit double the typical settling time in
this 6 LSB region.
Specifications subject to change without notice.
–2–
REV. A
ADI [ ADI ]
