DAC8562–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter
(@ V
DD
= +5.0
Symbol
5%, R
S
= No Load, –40 C
≤
T
A
≤
+85 C, unless otherwise noted)
Min
Typ
Max
Units
Condition
STATIC PERFORMANCE
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Scale Error
Full-Scale Voltage
N
INL
DNL
V
ZSE
V
FS
TCV
FS
I
OUT
LD
REG
C
L
V
REF
I
REF
LN
REJ
LD
REG
V
IL
V
IH
I
IL
C
IL
t
CEW
t
DS
t
DH
t
CLRW
t
S
Full-Scale Tempco
ANALOG OUTPUT
Output Current
Load Regulation at Half Scale
Capacitive Load
REFERENCE OUTPUT
Output Voltage
Output Source Current
Line Rejection
Load Regulation
LOGIC INPUTS
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
INTERFACE TIMING SPECIFICATIONS
1, 4
Chip Enable Pulse Width
Data Setup
Data Hold
Clear Pulse Width
AC CHARACTERISTICS
4
Voltage Output Settling Time
6
Digital Feedthrough
SUPPLY CHARACTERISTICS
Positive Supply Current
Power Dissipation
Power Supply Sensitivity
Note 2
E Grade
F Grade
No Missing Codes
Data = 000
H
Data - FFF
H3
E Grade
F Grade
Notes 3, 4
Data = 800
H
R
L
= 402
Ω
to
∞,
Data = 800
H
No Oscillation
4
12
–1/2
–1
–1
±
1/4
±
3/4
±
3/4
+1/2
4.095
4.095
±
16
±
7
1
500
2.500
7
+1/2
+1
+1
+3
4.103
4.111
Bits
LSB
LSB
LSB
LSB
V
V
ppm/°C
mA
LSB
pF
V
mA
%/V
%/mA
V
V
µA
pF
ns
ns
ns
ns
4.087
4.079
±
5
3
Note 5
I
REF
= 0 to 5 mA
2.484
5
2.516
0.08
0.1
0.8
2.4
Note 4
30
30
10
20
To
±
1 LSB of Final Value
16
35
3
0.6
15
3
0.002
6
1
30
5
0.004
10
10
µs
nV sec
mA
mA
mW
mW
%/%
I
DD
P
DISS
PSS
V
IH
= 2.4 V, V
IL
= 0.8 V
V
IL
= 0 V, V
DD
= +5 V
V
IH
= 2.4 V, V
IL
= 0.8 V
V
IL
= 0 V, V
DD
= +5V
∆V
DD
=
±
5%
NOTES
1
All input control signals are specified with t
r
= t
f
= 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
2
1 LSB = 1 mV for 0 to +4.095 V output range.
3
Includes internal voltage reference error.
4
These parameters are guaranteed by design and not subject to production testing.
5
Very little sink current is available at the REFOUT pin. Use external buffer if setting up a virtual ground.
6
The settling time specification does not apply for negative going transitions within the last 6 LSBs of ground. Some devices exhibit double the typical settling time in
this 6 LSB region.
Specifications subject to change without notice.
–2–
REV. A
AD [ ANALOG DEVICES ]
