ADV7390/ADV7391/ADV7392/ADV7393
ED/HD Sinc Compensation Filter Response
Table 40 shows sample color values that can be programmed
into the color registers when the output standard selection is set
to EIA770.2/EIA770.3 (Subaddress 0x30, Bits[1:0] = 00).
Subaddress 0x33, Bit 3
The ADV739x includes a filter designed to counter the effect of
sinc roll-off in DAC 1, DAC 2, and DAC 3 while operating in
ED/HD mode. This filter is enabled by default. It can be
disabled using Subaddress 0x33, Bit 3. The benefit of the filter is
illustrated in Figure 68 and Figure 69.
Table 40. Sample Color Values for EIA770.2/EIA770.3
ED/HD Output Standard Selection
Sample Color
Y Value
Cr Value
Cb Value
White
Black
Red
Green
Blue
Yellow
Cyan
235 (0xEB)
128 (0x80) 128 (0x80)
128 (0x80) 128 (0x80)
0.5
16
81
(0x10)
(0x51)
240 (0xF0)
90
(0x5A)
(0x36)
0.4
0.3
145 (0x91)
41 (0x29)
34
(0x22) 54
110 (0x6E)
240 (0xF0)
(0x10)
(0x10) 166 (0xA6)
106 (0x6A) 222 (0xDE) 202 (0xCA)
0.2
210 (0xD2) 146 (0x92) 16
170 (0xAA) 16
0.1
0
Magenta
–0.1
–0.2
–0.3
–0.4
–0.5
COLOR SPACE CONVERSION MATRIX
Subaddress 0x03 to Subaddress 0x09
The internal color space conversion (CSC) matrix automatically
performs all color space conversions based on the input mode
programmed in the mode select register (Subaddress 0x01,
Bits[6:4]). Table 41 and Table 42 show the options available in
this matrix.
0
5
10
15
20
25
30
FREQUENCY (MHz)
Figure 68. ED/HD Sinc Compensation Filter Enabled
0.5
0.4
An SD color space conversion from RGB-in to YPrPb-out is
possible on the ADV7392/ADV7393. An ED/HD color space
conversion from RGB-in to YPrPb-out is not possible.
0.3
0.2
Table 41. SD Color Space Conversion Options
0.1
YPrPb/RGB Out
RGB In/YCrCb In
(Reg. 0x87, Bit 7)
0
Input Output1 (Reg. 0x02, Bit 5)
–0.1
–0.2
–0.3
–0.4
–0.5
YCrCb YPrPb
YCrCb RGB
1
0
1
0
0
0
1
1
RGB2
RGB2
YPrPb
RGB
1 CVBS/YC outputs are available for all CSC combinations.
2 Available on the ADV7392/ADV7393 (40-pin devices) only.
0
5
10
15
20
25
30
FREQUENCY (MHz)
Figure 69. ED/HD Sinc Compensation Filter Disabled
Table 42. ED/HD Color Space Conversion Options
Input
YCrCb
YCrCb
Output
YPrPb
RGB
YPrPb/RGB Out (Reg. 0x02, Bit 5)
ED/HD TEST PATTERN COLOR CONTROLS
Subaddress 0x36 to Subaddress 0x38
1
0
Three 8-bit registers at Subaddress 0x36 to Subaddress 0x38
are used to program the output color of the internal ED/HD
test pattern generator (Subaddress 0x31, Bit 2 = 1), whether it
be the lines of the cross hatch pattern or the uniform field test
pattern. They are not functional as color controls for external
pixel data input.
ED/HD Manual CSC Matrix Adjust Feature
The ED/HD manual CSC matrix adjust feature provides custom
coefficient manipulation for color space conversions and is used
in ED and HD modes only. The ED/HD manual CSC matrix
adjust feature can be enabled using Subaddress 0x02, Bit 3.
The values for the luma (Y) and color difference (Cr and Cb)
signals used to obtain white, black, and saturated primary and
complementary colors conform to the ITU-R BT.601-4
standard.
Normally, there is no need to enable this feature because the CSC
matrix automatically performs the color space conversion based
on the input mode chosen (ED or HD) and the output color
space selected (see Table 42). For this reason, the ED/HD
manual CSC matrix adjust feature is disabled by default.
Rev. 0 | Page 50 of 96
ADI [ ADI ]
