ADV7300A/ADV7301A
CLKIN_A
t
9
CONTROL
I/PS
P_HSYNC,
P_VSYNC,
P_BLANK
t
10
t
12
Y9–Y0
Y0
Y1
Y2
Y3
Y4
Y5
C9–C0
Cb0
Cr0
Cb2
Cr2
Cb4
Cr4
t
11
CONTROL
O/PS
S_HSYNC,
S_VSYNC
t
13
t
14
t
9
= CLOCK HIGH TIME,
t
10
= CLOCK LOW TIME,
t
11
= DATA SETUP TIME,
t
12
= DATA HOLD TIME
Figure 2. HD 4:2:2 Input Data Format Timing Diagram, Input Mode: PS Input Only, HDTV
Input Only (Input Mode at Subaddress 01h = 001 or 010)
CLKIN_A
t
9
CONTROL
I/PS
P_HSYNC,
P_VSYNC,
P_BLANK
Y9–Y0
Y0
t
10
Y1
Y2
Yxxx
Yxxx
C9–C0
Cb0
Cb1
Cb2
Cb3
Cbxxx
Cbxxx
S9–S0
Cr0
Cr1
Cr2
Cr3
Crxxx
Crxxx
t
11
CONTROL
O/PS
S_HSYNC,
S_VSYNC
t
12
t
13
t
14
t
9
= CLOCK HIGH TIME,
t
10
= CLOCK LOW TIME,
t
11
= DATA SETUP TIME,
t
12
= DATA HOLD TIME
Figure 3. HD 4:4:4 YCrCb Input Data Format Timing Diagram, Input Mode: PS Input Only,
HDTV Input Only (Input Mode at Subaddress 01h = 001 or 010)
–6–
REV. A