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ADV7300AKST 参数 Datasheet PDF下载

ADV7300AKST图片预览
型号: ADV7300AKST
PDF下载: 下载PDF文件 查看货源
内容描述: 多格式标清,逐行扫描/ HDTV视频编码器与六NSV⑩ 12位DAC [Multiformat SD, Progressive Scan/HDTV Video Encoder with Six NSV⑩ 12-Bit DACs]
分类和应用: 电视编码器
文件页数/大小: 68 页 / 1126 K
品牌: AD [ ANALOG DEVICES ]
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ADV7300A/ADV7301A–SPECIFICATIONS
(V
AA
= V
DD
= 2.375 V–2.625 V, V
DD_IO
= 2.375 V–3.600 V, V
REF
= 1.235 V, R
SET
= 760
Parameter
STATIC PERFORMANCE
1
Resolution
Integral Nonlinearity
Differential Nonlinearity, +ve
2
Differential Nonlinearity, –ve
2
DIGITAL OUTPUTS
Output Low Voltage, V
OL
Output High Voltage, V
OH
Three-State Leakage Current
Three-State Output Capacitance
DIGITAL AND CONTROL INPUTS
Input High Voltage, V
IH
Input Low Voltage, V
IL
Input Leakage Current
Input Capacitance, C
IN
ANALOG OUTPUTS
Full-Scale Output Current
Output Current Range
Full-Scale Output Current
Output Current Range
DAC to DAC Matching
Output Compliance Range, V
OC
Output Capacitance, C
OUT
VOLTAGE REFERENCE
Reference Range, V
REF
POWER REQUIREMENTS
Normal Power Mode
I
DD4
Min
Typ
12
±
2.0
0.25
2.0
0.4 [0.4]
3
2.4 [2.0]
3
, R
LOAD
= 150
Max
, T
MIN
to T
MAX
(0 C to 70 C), unless otherwise noted.)
Unit
Bits
LSB
LSB
LSB
V
V
µA
pF
V
V
µA
pF
mA
mA
mA
mA
%
V
pF
V
Test Conditions
V
AA
= 2.5 V
V
AA
= 2.5 V
I
SINK
= 3.2 mA
I
SOURCE
= 400
µA
V
IN
= 0.4 V, 2.4 V
±
1.0
2
2
0.8
1
2
8.2
8.2
4.1
4.1
0
8.7
8.7
4.35
4.35
2.0
1.0
7
1.235
9.2
9.2
4.6
4.6
1.4
V
IN
= 2.4 V
R
SET1, 2
= 1520
R
SET1, 2
= 1520
1.15
1.3
I
DD_IO
I
AA5,6
Sleep Mode
I
DD
I
AA
I
DD_IO
Power Supply Rejection Ratio
93
52
84
90
99
108
0.2
70
130
10
110
0.01
110
75
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
µA
%/%
SD Only [8 ]
PS Only [4 ]
HDTV Only [2 ]
SD and PS
SD [8 ] and HDTV
SD and HDTV [2 ]
NOTES
1
Oversampling disabled. Static DAC performance will be improved with increased oversampling ratios.
2
DNL measures the deviation of the actual DAC o/p voltage step from the ideal. For +ve DNL, the actual step value lies above the ideal step value; for –ve DNL, the
actual step values lie below the ideal step value.
3
Value in brackets for V
DD_IO
= 2.375 V to 2.750 V.
4
I
DD
or the circuit current is the continuous current required to drive the digital core without the I
PLL
.
5
I
AA
is the total current required to supply all DACs including the V
REF
and PLL circuitry.
6
All DACs on.
Specifications subject to change without notice.
REV. A
–3–