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ADV7180BSTZ 参数 Datasheet PDF下载

ADV7180BSTZ图片预览
型号: ADV7180BSTZ
PDF下载: 下载PDF文件 查看货源
内容描述: 10位, 4倍过采样SDTV视频解码器 [10-Bit, 4 x Oversampling SDTV Video Decoder]
分类和应用: 解码器电视
文件页数/大小: 112 页 / 2178 K
品牌: ADI [ ADI ]
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ADV7180  
SYNC PROCESSING  
Table 64. NTSC  
The ADV7180 has two additional sync processing blocks that  
postprocess the raw synchronization information extracted  
from the digitized input video. If desired, the blocks can be  
disabled via the following two I2C bits.  
Feature  
Standard  
Teletext System B and D  
Teletext System C/NABTS  
Vertical Interval Time Codes (VITC )  
ITU-R BT.653  
ITU-R BT.653/EIA-516  
Copy Generation Management  
System (CGMS)  
EIA-J CPR-1204/IEC 61880  
ENHSPLL, Enable Hsync Processor, Address 0x01 [6]  
The HSYNC processor is designed to filter incoming hsyncs  
that have been corrupted by noise, providing improved per-  
formance for video signals with stable time bases but poor SNR.  
Gemstar  
Closed Captioning (CCAP)  
EIA-608  
Setting ENHSPLL to 0 disables the hsync processor.  
The VBI data standard that the VDP decodes on a particular  
line of incoming video has been set by default as described in  
Table 65. This can be overridden manually and any VBI data  
can be decoded on any line. The details of manual  
programming are described in Table 66.  
Setting ENHSPLL to 1 (default) enables the hsync processor.  
ENVSPROC, Enable Vsync Processor, Address 0x01 [3]  
This block provides extra filtering of the detected vsyncs to  
improve vertical lock.  
VDP Default Configuration  
Setting ENVSPROC to 0 disables the vsync processor.  
Setting ENVSPROC to 1(default) enables the vsync processor.  
VBI DATA DECODE  
The VDP can decode different VBI data standards on a line-to-  
line basis. The various standards supported by default on  
different lines of VBI are explained in Table 65.  
VDP Manual Configuration  
There are two VBI data slicers on the ADV7180. The first is  
called the VBI data processor (VDP), and the second is called  
VBI System 2.  
MAN_LINE_PGM, Enable Manual Line Programming of  
VBI Standards, Address 0x64 [7], User Sub Map  
The user can configure the VDP to decode different standards on  
a line-to-line basis through manual line programming. For this,  
the user has to set the MAN_LINE_PGM bit. The user needs to  
write into all the line programming registers VBI_DATA_Px_Ny  
(see Register 0x64 to Register 0x77 in Table 104).  
The VDP can slice both low bandwidth standards and high  
bandwidth standards such as teletext. VBI System 2 can slice  
low data rate VBI standards only.  
The VDP is capable of slicing multiple VBI data standards on  
SD video. It decodes the VBI data on the incoming CVBS and  
Y/C or YUV data. The decoded results are available as ancillary  
data in output 656 data stream. For low data rate VBI standards  
like CC/WSS/CGMS, users can read the decoded data bytes  
from I2C registers.  
0 (default)—The VDP decodes default standards on lines, as  
shown in Table 65.  
1—VBI standards to be decoded are manually programmed.  
VBI_DATA_Px_Ny [3:0], VBI Standard to be Decoded on  
Line X for PAL, Line Y for NTSC, Addresses 0x64 to 0x77,  
User Sub Map  
The VBI data standards that can be decoded by the VDP are  
listed in Table 63 and Table 64.  
Table 63. PAL  
Feature  
These are related 4-bit clusters in Register 0x64 to Register 0x77  
of the User Sub Map. These 4-bit, line programming registers,  
named VBI_DATA_Px_Ny, identify the VBI data standard that  
would be decoded on Line X in PAL or on Line Y in NTSC  
mode. The different types of VBI standards decoded by  
Standard  
Teletext System A, C, or D  
Teletext System B/WST  
Video Programming System (VPS)  
Vertical Interval Time Codes ( VITC)  
Wide Screen Signaling (WSS)  
ITU-R BT.653  
ITU-R BT.653  
ETSI EN 300 231 V 1.3.1  
ITU-R BT.1119-1/  
ETSI EN.300294  
VBI_DATA_Px_Ny are shown in Table 66. Note that the X or Y  
value depends on whether the ADV7180 is in PAL or NTSC mode.  
Closed Captioning (CCAP)  
Rev. A | Page 50 of 112  
 
 
 
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