ADV7180
Bit (Shading Indicates
Default State)
User Sub Map
Address Register
Bit Description
7
6
5
4
3
2
1
0
0
1
Comments
Notes
0x78
VDP_STATUS
(Read Only)
CC_AVL.
Closed captioning not detected
Closed captioning detected
CC_CLEAR resets the
CC_AVL bit
CC_EVEN_FIELD.
CGMS_WSS_AVL.
0
1
Closed captioning decoded from
odd field
Closed captioning decoded from
even field
0
1
CGMS/WSS not detected
CGMS/WSS detected
CGMS_WSS_CLEAR resets
the CGMS_WSS_AVL bit
Reserved.
0
GS_PDC_VPS_UTC_AVL.
0
1
VPS not detected
VPS detected
GS_PDC_VPS_UTC_CLEAR
resets the
GS_PDC_VPS_UTC_AVL
bit
GS_DATA_TYPE.
VITC_AVL.
0
1
Gemstar_1× detected
Gemstar_2× detected
VITC not detected
0
1
VITC_CLEAR resets the
VITC_AVL bit
VITC detected
TTXT_AVL.
0
1
Teletext not detected
Teletext detected
VDP_STATUS_CLEAR
(Write Only)
CC_CLEAR.
0
1
Does not reinitialize the CCAP registers
Reinitializes the CCAP readback registers
This is a self-clearing bit
This is a self-clearing bit
Reserved.
0
CGMS_WSS_CLEAR.
0
1
Does not reinitialize the CGMS/WSS
registers
Reinitializes the CGMS/WSS readback
registers
Reserved.
0
GS_PDC_VPS_UTC_CLEAR.
0
1
Does not reinitialize the GS/PDC/VPS/
UTC registers
This is a self-clearing bit
This is a self-clearing bit
Refreshes the GS/PDC/VPS/UTC
readback registers
Reserved.
0
VITC_CLEAR.
0
1
Does not reinitialize the VITC registers
Reinitializes the VITC readback registers
Reserved.
0
x
0x79
0x7A
0x7D
VDP_CCAP_DATA_0
(Read Only)
VDP_CCAP_DATA_1
(Read Only)
VDP_CGMS_WSS_DATA_0
(Read Only)
CCAP_BYTE_1[7:0].
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Decoded Byte 1 of CCAP
CCAP_BYTE_2[7:0].
x
Decoded Byte 2 of CCAP
CGMS_CRC[5:2].
Reserved.
CGMS_WSS[13:8].
CGMS_CRC[1:0].
CGMS_WSS[7:0].
Decoded CRC sequence for CGMS
0
0
0
x
0
x
0x7E
VDP_CGMS_WSS_DATA_1
(Read Only)
x
x
x
x
Decoded CGMS/WSS data
Decoded CRC sequence for CGMS
Decoded CGMS/WSS data
x
x
x
x
0x7F
0x84
0x85
0x86
0x87
0x88
0x89
0x8A
0x8B
0x8C
0x8D
0x8E
VDP_CGMS_WSS_DATA_2
(Read Only)
VDP_GS_VPS_PDC_UTC_0
(Read Only)
VDP_GS_VPS_PDC_UTC_1
(Read Only)
VDP_GS_VPS_PDC_UTC_2
(Read Only)
VDP_GS_VPS_PDC_UTC_3
(Read Only)
VDP_VPS_PDC_UTC_4
(Read Only)
VDP_VPS_PDC_UTC_5
(Read Only)
VDP_VPS_PDC_UTC_6
(Read Only)
VDP_VPS_PDC_UTC_7
(Read only)
VDP_VPS_PDC_UTC_8
(Read Only)
VDP_VPS_PDC_UTC_9
(Read Only)
VDP_VPS_PDC_UTC_10
(Read Only)
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
GS_VPS_PDC_UTC_BYTE_0[7:0].
GS_VPS_PDC_UTC_BYTE_1[7:0].
GS_VPS_PDC_UTC_BYTE_2[7:0].
GS_VPS_PDC_UTC_BYTE_3[7:0].
VPS_PDC_UTC_BYTE_4[7:0].
VPS_PDC_UTC_BYTE_5[7:0].
VPS_PDC_UTC_BYTE_6[7:0].
VPS_PDC_UTC_BYTE_7[7:0].
VPS_PDC_UTC_BYTE_8[7:0].
VPS_PDC_UTC_BYTE_9[7:0].
VPS_PDC_UTC_BYTE_10[7:0].
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Decoded Gemstar/VPS/PDC/UTC data
Decoded Gemstar/VPS/PDC/UTC data
Decoded Gemstar/VPS/PDC/UTC data
Decoded Gemstar/VPS/PDC/UTC data
Decoded VPS/PDC/UTC data
Decoded VPS/PDC/UTC data
Decoded VPS/PDC/UTC data
Decoded VPS/PDC/UTC data
Decoded VPS/PDC/UTC data
Decoded VPS/PDC/UTC data
Decoded VPS/PDC/UTC data
Rev. A | Page 104 of 112
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