ADSP-BF531/ADSP-BF532/ADSP-BF533
150
V
DDEXT
= 3.65V
V
DDEXT
= 3.30V
V
DDEXT
= 2.95V
100
SOURCE
CURRENT (mA)
V
TRIP
(high) is 2.0 V and V
TRIP
(low) is 1.0 V . Time t
TRIP
is the
interval from when the output starts driving to when the output
reaches the V
TRIP
(high) or V
TRIP
(low) trip voltage.
Time
t
ENA
is calculated as shown in the equation:
t
ENA
=
t
ENA_MEASURED
–
t
TRIP
If multiple pins (such as the data bus) are enabled, the measure
ment value is that of the first pin to start driving.
50
0
V
OH
–50
V
OL
–100
Output Disable Time Measurement
Output pins are considered to be disabled when they stop driv
ing, go into a high impedance state, and start to decay from their
output high or low voltage. The output disable time t
DIS
is the
difference between
t
DIS_MEASURED
and
t
DECAY
as shown on the left
side of
t
DIS
=
t
DIS_MEASURED
–
t
DECAY
The time for the voltage on the bus to decay by
Δ
V
is dependent
on the capacitive load
C
L
and the load current
I
I
. This decay time
can be approximated by the equation:
t
DECAY
=
(C
L
ΔV) ⁄
I
L
The time
t
DECAY
is calculated with test loads
C
L
and
I
L
, and with
Δ
V
equal to 0.1 V for V
DDEXT
(nominal) = 1.8 V or 0.5 V for
V
DDEXT
(nominal) = 2.5 V/3.3 V.
The time
t
DIS_MEASURED
is the interval from when the reference
signal switches, to when the output voltage decays
Δ
V
from the
measured output high or output low voltage.
–150
0
0.5
1.0
1.5
2.0
SOURCE
VOLTAGE (V)
2.5
3.0
3.5
Figure 41. Drive Current D (V
DDEXT
= 3.3 V)
POWER DISSIPATION
Many operating conditions can affect power dissipation. System
designers should refer to
Estimating Power for ADSP-BF531/
BF532/BF533 Blackfin Processors (EE-229)
on the Analog
Devices website (www.analog.com)—use site search on
“EE-229.” This document provides detailed information for
optimizing your design for lowest power.
See the
ADSP-BF533 Blackfin Processor Hardware Reference
Manual
for definitions of the various operating modes and for
instructions on how to minimize system power.
TEST CONDITIONS
All timing parameters appearing in this data sheet were mea
sured under the conditions described in this section.
shows the measurement point for ac measurements (except out
put enable/disable). The measurement point V
MEAS
is 0.95 V for
V
DDEXT
(nominal) = 1.8 V or 1.5 V for V
DDEXT
(nominal) = 2.5 V/
3.3 V.
INPUT
OR
OUTPUT
REFERENCE
SIGNAL
t
DIS_MEASURED
t
DIS
V
OH
(MEASURED)
V
OL
(MEASURED)
t
ENA_MEASURED
t
ENA
V
OH
(MEASURED)
�½ �½V
V
OL
(MEASURED) +
�½V
V
OH
(MEASURED)
V
TRIP
(HIGH)
V
TRIP
(LOW)
V
OL
(MEASURED)
V
MEAS
V
MEAS
t
DECAY
t
TRIP
Figure 42. Voltage Reference Levels for AC
Measurements (Except Output Enable/Disable)
OUTPUT STOPS DRIVING
OUTPUT STARTS DRIVING
HIGH IMPEDANCE STATE
Output Enable Time Measurement
Output pins are considered to be enabled when they have made
a transition from a high impedance state to the point when they
start driving.
The output enable time t
ENA
is the interval from the point when a
reference signal reaches a high or low voltage level to the point
when the output starts driving as shown on the right side of
The time t
ENA
_
MEASURED
is the interval, from when the reference sig-
nal switches, to when the output voltage reaches V
TRIP
(high) or
V
TRIP
(low). For V
DDEXT
(nominal) = 1.8 V—V
TRIP
(high) is 1.3 V
and V
TRIP
(low) is 0.7 V. For V
DDEXT
(nominal) = 2.5 V/3.3 V—
Rev. E |
Figure 43. Output Enable/Disable
Example System Hold Time Calculation
To determine the data output hold time in a particular system,
first calculate
t
DECAY
using the equation given above. Choose
Δ
V
to be the difference between the ADSP-BF531/ADSP-BF532/
ADSP-BF533 processor’s output voltage and the input thresh-
old for the device requiring the hold time.
C
L
is the total bus
capacitance (per data line), and I
L
is the total leakage or
three-state current (per data line). The hold time will be
t
DECAY
Page 45 of 60 |
July 2007
AD [ ANALOG DEVICES ]
