ADSP-BF531/ADSP-BF532
Table 23. Serial Ports—Enable and Three-State
VDDEXT = 1.8 V VDDEXT = 2.5 V/3.3 V
Parameter
Min Max Min
Max
Unit
Switching Characteristics
tDTENE
tDDTTE
tDTENI
tDDTTI
Data Enable Delay from External TSCLK1
Data Disable Delay from External TSCLK1
Data Enable Delay from Internal TSCLK1
Data Disable Delay from Internal TSCLK1
0
0
ns
ns
ns
ns
10.0
3.0
10.0
3.0
−2.0
−2.0
1 Referenced to drive edge.
Table 24. External Late Frame Sync
VDDEXT = 1.8 V VDDEXT = 2.5 V/3.3 V
Parameter
Min Max Min
Max
Unit
Switching Characteristics
tDDTLFSE Data Delay from Late External TFS or External RFS with MCE = 1, MFD = 01, 2
tDTENLFS Data Enable from Late FS or MCE = 1, MFD = 01,2
10.0
10.0
ns
ns
0
0
1 MCE = 1, TFS enable and TFS valid follow tDTENLFS and tDDTLFSE
.
2 If external RFS/TFS setup to RSCLK/TSCLK > tSCLKE/2, then tDDTE I and tDTENE I apply; otherwise tDDTLFSE and tDTENLFS apply.
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Rev. D
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Page 33 of 60
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August 2006
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