ADSP-2181
ABSO LUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Output Voltage Swing . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Operating T emperature Range (Ambient) . . . . –40°C to +85°C
Storage T emperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead T emperature (5 sec) T QFP . . . . . . . . . . . . . . . . +280°C
Lead T emperature (5 sec) PQFP . . . . . . . . . . . . . . . . . +280°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. T hese are stress ratings only; functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ESD SENSITIVITY
T he ADSP-2181 is an ESD (electrostatic discharge) sensitive device. Electrostatic charges readily
accumulate on the human body and equipment and can discharge without detection. Permanent
damage may occur to devices subjected to high energy electrostatic discharges.
WARNING!
T he ADSP-2181 features proprietary ESD protection circuitry to dissipate high energy discharges
(Human Body Model). Per method 3015 of MIL-ST D-883, the ADSP-2181 has been classified as
a Class 1 device.
ESD SENSITIVE DEVICE
Proper ESD precautions are recommended to avoid performance degradation or loss of function-
ality. Unused devices must be stored in conductive foam or shunts, and the foam should be
discharged to the destination before devices are removed.
TIMING PARAMETERS
GENERAL NO TES
MEMO RY TIMING SP ECIFICATIO NS
Use the exact timing information given. Do not attempt to
derive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results for
an individual device, the values given in this data sheet reflect
statistical variations and worst cases. Consequently, you cannot
meaningfully add up parameters to derive longer times.
T he table below shows common memory device specifications
and the corresponding ADSP-2181 timing parameters, for your
convenience.
Mem ory
AD SP -2181 Tim ing
D evice
Tim ing
P aram eter
Specification
P aram eter D efinition
TIMING NO TES
Address Setup to
Write Start
Address Setup to
Write End
tASW
A0–A13, xMS Setup before
WR Low
A0–A13, xMS Setup before
WR Deasserted
A0–A13, xMS Hold after
WR Deasserted
Switching Characteristics specify how the processor changes its
signals. You have no control over this timing—circuitry external
to the processor must be designed for compatibility with these
signal characteristics. Switching characteristics tell you what the
processor will do in a given circumstance. You can also use switch-
ing characteristics to ensure that any timing requirement of a
device connected to the processor (such as memory) is satisfied.
tAW
Address Hold T ime tWRA
Data Setup T ime
tDW
Data Setup before WR
High
Timing Requirements apply to signals that are controlled by cir-
cuitry external to the processor, such as the data input for a read
operation. T iming requirements guarantee that the processor
operates correctly with other devices.
Data Hold T ime
OE to Data Valid
Address Access Time tAA
tDH
tRDD
Data Hold after WR High
RD Low to Data Valid
A0–A13, xMS to Data Valid
xMS = PMS, DMS, BMS, CMS, IOMS.
FREQ UENCY D EP END ENCY FO R TIMING
SP ECIFICATIO NS
tCK is defined as 0.5tCKI. T he ADSP-2181 uses an input clock
with a frequency equal to half the instruction rate: a 16.67 MHz
input clock (which is equivalent to 60 ns) yields a 30 ns proces-
sor cycle (equivalent to 33 MHz). tCK values within the range of
0.5tCKI period should be substituted for all relevant timing pa-
rameters to obtain the specification value.
Example: tCKH = 0.5tCK – 7 ns = 0.5 (25 ns) – 7 ns = 8 ns
REV. D
–13–
ADI [ ADI ]
