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ADSP-2181KS-160 参数 Datasheet PDF下载

ADSP-2181KS-160图片预览
型号: ADSP-2181KS-160
PDF下载: 下载PDF文件 查看货源
内容描述: 微电脑DSP [DSP Microcomputer]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器装置电脑时钟
文件页数/大小: 32 页 / 293 K
品牌: ADI [ ADI ]
 浏览型号ADSP-2181KS-160的Datasheet PDF文件第8页浏览型号ADSP-2181KS-160的Datasheet PDF文件第9页浏览型号ADSP-2181KS-160的Datasheet PDF文件第10页浏览型号ADSP-2181KS-160的Datasheet PDF文件第11页浏览型号ADSP-2181KS-160的Datasheet PDF文件第13页浏览型号ADSP-2181KS-160的Datasheet PDF文件第14页浏览型号ADSP-2181KS-160的Datasheet PDF文件第15页浏览型号ADSP-2181KS-160的Datasheet PDF文件第16页  
ADSP-2181–SPECIFICATIONS  
RECOMMENDED OPERATING CONDITIONS  
K Grade  
B Grade  
P aram eter  
Min  
Max  
Min  
Max  
Unit  
VDD  
T AMB  
Supply Voltage  
Ambient Operating T emperature  
4.5  
0
5.5  
+70  
4.5  
–40  
5.5  
+85  
V
°C  
ELECTRICAL CHARACTERISTICS  
K/B Grades  
Typ  
P aram eter  
Test Conditions  
Min  
Max  
Unit  
VIH  
VIH  
VIL  
VOH  
Hi-Level Input Voltage1, 2  
Hi-Level CLKIN Voltage  
Lo-Level Input Voltage1, 3  
Hi-Level Output Voltage1, 4, 5  
@ VDD = max  
@ VDD = max  
@ VDD = min  
@ VDD = min  
IOH = –0.5 mA  
@ VDD = min  
IOH = –100 µA6  
@ VDD = min  
IOL = 2 mA  
@ VDD = max  
VIN = VDDmax  
@ VDD = max  
VIN = 0 V  
@ VDD = max  
VIN = VDDmax8  
@ VDD = max  
VIN = 0 V8  
@ VDD = 5.0  
TAMB = +25°C  
tCK = 34.7 ns  
tCK = 30 ns  
2.0  
2.2  
V
V
V
0.8  
2.4  
V
VDD – 0.3  
V
VOL  
IIH  
Lo-Level Output Voltage1, 4, 5  
Hi-Level Input Current3  
0.4  
10  
10  
10  
10  
V
µA  
µA  
µA  
µA  
IIL  
Lo-Level Input Current3  
T hree-State Leakage Current7  
T hree-State Leakage Current7  
Supply Current (Idle)9  
IOZH  
IOZL  
IDD  
12  
13  
15  
mA  
mA  
mA  
tCK = 25 ns  
IDD  
Supply Current (Dynamic)10  
@ VDD = 5.0  
TAMB = +25°C  
tCK = 34.7 ns11  
tCK = 30 ns11  
tCK = 25 ns11  
@ VIN = 2.5 V,  
fIN = 1.0 MHz,  
TAMB = +25°C  
@ VIN = 2.5 V,  
fIN = 1.0 MHz,  
TAMB = +25°C  
65  
73  
85  
mA  
mA  
mA  
CI  
Input Pin Capacitance3, 6, 12  
8
8
pF  
pF  
CO  
Output Pin Capacitance6, 7, 12, 13  
NOT ES  
1Bidirectional pins: D0–D23, RFS0, RFS1, SCLK0, SCLK1, T FS0, T FS1, A1–A13, PF0–PF7.  
2Input only pins: RESET, BR, DR0, DR1, PWD.  
3Input only pins: CLKIN, RESET, BR, DR0, DR1, PWD.  
4Output pins: BG, PMS, DMS, BMS, IOMS, CMS, RD, WR, PWDACK, A0, DT 0, DT 1, CLKOUT , FL2-0, BGH.  
5Although specified for T T L outputs, all ADSP-2186 outputs are CMOS-compatible and will drive to VDD and GND, assuming no dc loads.  
6Guaranteed but not tested.  
7T hree-statable pins: A0–A13, D0–D23, PMS, DMS, BMS, IOMS, CMS, RD, WR, DT 0, DT 1, SCLK0, SCLK1, T FS0, T FS1, RFS0, RSF1, PF0–PF7.  
80 V on BR, CLKIN Inactive.  
9Idle refers to ADSP-2181 state of operation during execution of IDLE instruction. Deasserted pins are driven to either V DD or GND.  
10  
I
measurement taken with all instructions executing from internal memory. 50% of the instructions are multifunction (types 1, 4, 5, 12, 13, 14), 30% are type 2  
DD  
and type 6, and 20% are idle instructions.  
11  
V
= 0 V and 3 V. For typical figures for supply currents, refer to Power Dissipation section.  
IN  
12Applies to T QFP and PQFP package types.  
13Output pin capacitance is the capacitive load for any three-stated output pin.  
Specifications subject to change without notice.  
–12–  
REV. D  
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