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ADSP-21062KS-160 参数 Datasheet PDF下载

ADSP-21062KS-160图片预览
型号: ADSP-21062KS-160
PDF下载: 下载PDF文件 查看货源
内容描述: ADSP- 2106x SHARC DSP单片机系列 [ADSP-2106x SHARC DSP Microcomputer Family]
分类和应用:
文件页数/大小: 48 页 / 368 K
品牌: ADI [ ADI ]
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ADSP-21062/ADSP-21062L  
0x0040 0000  
0x0000 0000  
0x0002 0000  
IOP REGISTERS  
BANK 0  
INTERNAL  
MEMORY  
SPACE  
MS  
MS  
MS  
0
1
2
NORMAL WORD ADDRESSING  
SHORT WORD ADDRESSING  
DRAM  
(OPTIONAL)  
0x0004 0000  
0x0008 0000  
INTERNAL MEMORY SPACE  
OF ADSP-2106x  
BANK 1  
BANK 2  
WITH ID=001  
0x0010 0000  
0x0018 0000  
INTERNAL MEMORY SPACE  
OF ADSP-2106x  
WITH ID=010  
INTERNAL MEMORY SPACE  
OF ADSP-2106x  
WITH ID=011  
EXTERNAL  
MEMORY  
SPACE  
0x0020 0000  
0x0028 0000  
MULTIPROCESSOR  
MEMORY SPACE  
INTERNAL MEMORY SPACE  
OF ADSP-2106x  
WITH ID=100  
MS  
BANK 3  
3
INTERNAL MEMORY SPACE  
OF ADSP-2106x  
WITH ID=101  
BANK SIZE IS  
0x0030 0000  
0x0038 0000  
SELECTED BY  
MSIZE BIT FIELD OF  
SYSCON  
INTERNAL MEMORY SPACE  
OF ADSP-2106x  
WITH ID=110  
REGISTER.  
BROADCAST WRITE  
TO ALL  
NONBANKED  
ADSP-2106xs  
0x003F FFFF  
NORMAL WORD ADDRESSING: 32-BIT DATA WORDS  
48-BIT INSTRUCTION WORDS  
SHORT WORD ADDRESSING: 16-BIT DATA WORDS  
0xFFFF FFFF  
Figure 4. ADSP-21062/ADSP-21062L Memory Map  
DEVELOPMENT TOOLS  
dimensioned arrays. The ADSP-21000 Family Development  
Software is available for both the PC and Sun platforms.  
The ADSP-21062 is supported with a complete set of software  
and hardware development tools, including an EZ-ICE In-  
Circuit Emulator, EZ-LAB® development board, EZ-KIT, and  
development software. The EZ-LAB contains an evaluation board  
with an ADSP-21062 (5 V) processor and provides a serial connec-  
tion to your PC. The SHARC EZ-KIT combines the ADSP-  
21000 Family Development Software for the PC and the  
EZ-LAB ADSP-21062’s Development Board in one package.  
The EZ-KIT contains in addition to the EZ-LAB development  
board, an optimizing compiler, assembler, instruction level simu-  
lator, run-time libraries, diagnostic utilities and a complete set  
of example programs.  
The ADSP-21062 EZ-ICE Emulator uses the IEEE 1149.1  
JTAG test access port of the ADSP-21062 processor to monitor  
and control the target board processor during emulation. The  
EZ-ICE provides full-speed emulation, allowing inspection and  
modification of memory, registers, and processor stacks. Nonintru-  
sive in-circuit emulation is assured by the use of the processor’s  
JTAG interface—the emulator does not affect target system  
loading or timing.  
Further details and ordering information are available in the  
ADSP-21000 Family Hardware & Software Development Tools  
data sheet (ADDS-210xx-TOOLS). This data sheet can be  
requested from any Analog Devices sales office, distributor or  
the Literature Center.  
The same EZ-ICE hardware can be used for the ADSP-21060/  
ADSP-21061, to fully emulate the ADSP-21062, with the excep-  
tion of displaying and modifying the two new SPORTS registers.  
The emulator will not display these two registers, but your  
code can use them.  
In addition to the software and hardware development tools  
available from Analog Devices, third parties provide a wide  
range of tools supporting the SHARC processor family. Hard-  
ware tools include SHARC PC plug-in cards, multiprocessor  
SHARC VME boards, and daughter card modules with multiple  
SHARCs and additional memory. These modules are based on  
the SHARCPAC™ module specification. Third party software  
tools include an Ada compiler, DSP libraries, operating systems,  
and block diagram design tools.  
Analog Devices’ ADSP-21000 Family Development Software  
includes an easy to use Assembler based on an algebraic syntax,  
an Assembly Library/Librarian, a Linker, an Instruction-level  
Simulator, an ANSI C optimizing Compiler, the CBug™ C  
Source-Level Debugger, and a C Runtime Library including  
DSP and mathematical functions. The Optimizing Compiler  
includes Numerical C extensions based on the work of the  
ANSI Numerical C Extensions Group. Numerical C provides  
extensions to the C language for array selection, vector math  
operations, complex data types, circular pointers, and variably  
ADDITIONAL INFORMATION  
This data sheet provides a general overview of the ADSP-21062  
architecture and functionality. For detailed information on the  
ADSP-21000 Family core architecture and instruction set, refer  
to the ADSP-21062 SHARC User’s Manual, Second Edition.  
CBug and SHARCPAC are trademarks of Analog Devices, Inc.  
EZ-LAB is a registered trademark of Analog Devices, Inc.  
REV. C  
–7–  
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