ADM1026
Table 111. Register 62h, FAN2 High Limit (Power-On Default FFh)
Bit
Name
R/W
Description
7–0
FAN2 High Limit
R/W
This register contains the high limit of the FAN2 tach channel.
Table 112. Register 63h, FAN3 High Limit (Power-On Default FFh)
Bit
Name
R/W
Description
7–0
FAN3 High Limit
R/W
This register contains the high limit of the FAN3 tach channel.
Table 113. Register 64h, FAN4 High Limit (Power-On Default FFh)
Bit
Name
R/W
Description
7–0
FAN4 High Limit
R/W
This register contains the high limit of the FAN4 tach channel.
Table 114. Register 65h, FAN5 High Limit (Power-On Default FFh)
Bit
Name
R/W
Description
7–0
FAN5 High Limit
R/W
This register contains the high limit of the FAN5 tach channel.
Table 115. Register 66h, FAN6 High Limit (Power-On Default FFh)
Bit
Name
R/W
Description
7–0
FAN6 High Limit
R/W
This register contains the high limit of the FAN6 tach channel.
Table 116. Register 67h, FAN7 High Limit (Power-On Default FFh)
Bit
Name
R/W
Description
7–0
FAN7 High Limit
R/W
This register contains the high limit of the FAN7 tach channel.
Table 117. Register 68h, Int Temp High Limit (Power-On Default 50h (80°C))
Bit
Name
R/W
Description
7–0
Int Temp High Limit
R/W
This register contains the high limit of the internal temperature channel.
Table 118. Register 69h, Int Temp Low Limit (Power-On Default 80h)
Bit
Name
R/W
Description
7–0
Int Temp Low Limit
R/W
This register contains the low limit of the internal temperature channel.
Table 119. Register 6Ah, VBAT High Limit (Power-On Default FFh)
Bit
Name
R/W
Description
7–0
VBAT High Limit
R/W
This register contains the high limit of the VBAT analog input channel.
Table 120. Register 6Bh, VBAT Low Limit (Power-On Default 00h)
Bit
Name
R/W
Description
7–0
VBAT Low Limit
R/W
This register contains the low limit of the VBAT analog input channel.
Table 121. Register 6Ch, AIN8 High Limit (Power-On Default FFh)
Bit
Name
R/W
Description
7–0
AIN8 High Limit
R/W
This register contains the high limit of the AIN8 analog input channel.
Table 122. Register 6Dh, AIN8 Low Limit (Power-On Default 00h)
Bit
Name
R/W
Description
7–0
AIN8 Low Limit
R/W
This register contains the low limit of the AIN8 analog input channel.
Rev. A | Page 52 of 56
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