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ADF4113BRU-REEL 参数 Datasheet PDF下载

ADF4113BRU-REEL图片预览
型号: ADF4113BRU-REEL
PDF下载: 下载PDF文件 查看货源
内容描述: [IC PLL FREQUENCY SYNTHESIZER, 4000 MHz, PDSO16, MO-153AB, TSSOP-16, PLL or Frequency Synthesis Circuit]
分类和应用: 信息通信管理光电二极管
文件页数/大小: 28 页 / 437 K
品牌: ADI [ ADI ]
 浏览型号ADF4113BRU-REEL的Datasheet PDF文件第1页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第2页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第3页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第5页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第6页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第7页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第8页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第9页  
ADF4110/ADF4111/ADF4112/ADF4113  
Parameter  
B Version  
B Chips1  
Unit  
Test Conditions/Comments  
POWER SUPPLIES  
AVDD  
DVDD  
VP  
2.7/5.5  
AVDD  
AVDD/6.0  
2.7/5.5  
AVDD  
AVDD/6.0  
V min/V max  
V min/V max  
AVDD ≤ VP ≤ 6.0 V. See Figure 25 and Figure 26.  
IDD5 (AIDD + DIDD)  
ADF4110  
ADF4111  
ADF4112  
ADF4113  
5.5  
5.5  
7.5  
11  
0.5  
1
4.5  
4.5  
6.5  
8.5  
0.5  
1
mA max  
mA max  
mA max  
mA max  
mA max  
µA typ  
4.5 mA typical  
4.5 mA typical  
6.5 mA typical  
8.5 mA typical  
TA = 25°C  
IP  
Low Power Sleep Mode  
NOISE CHARACTERISTICS  
ADF4113 Normalized Phase Noise Floor6  
Phase Noise Performance7  
ADF4110: 540 MHz Output8  
ADF4111: 900 MHz Output9  
ADF4112: 900 MHz Output9  
ADF4113: 900 MHz Output9  
ADF4111: 836 MHz Output10  
ADF4112: 1750 MHz Output11  
ADF4112: 1750 MHz Output12  
ADF4112: 1960 MHz Output13  
ADF4113: 1960 MHz Output13  
ADF4113: 3100 MHz Output14  
Spurious Signals  
−215  
−215  
dBc/Hz typ  
@ VCO output  
−91  
−87  
−90  
−91  
−78  
−86  
−66  
−84  
−85  
−86  
−91  
−87  
−90  
−91  
−78  
−86  
−66  
−84  
−85  
−86  
dBc/Hz typ  
dBc/Hz typ  
dBc/Hz typ  
dBc/Hz typ  
dBc/Hz typ  
dBc/Hz typ  
dBc/Hz typ  
dBc/Hz typ  
dBc/Hz typ  
dBc/Hz typ  
@ 1 kHz offset and 200 kHz PFD frequency  
@ 1 kHz offset and 200 kHz PFD frequency  
@ 1 kHz offset and 200 kHz PFD frequency  
@ 1 kHz offset and 200 kHz PFD frequency  
@ 300 Hz offset and 30 kHz PFD frequency  
@ 1 kHz offset and 200 kHz PFD frequency  
@ 200 Hz offset and 10 kHz PFD frequency  
@ 1 kHz offset and 200 kHz PFD frequency  
@ 1 kHz offset and 200 kHz PFD frequency  
@ 1 kHz offset and 1 MHz PFD frequency  
ADF4110: 540 MHz Output9  
ADF4111: 900 MHz Output9  
ADF4112: 900 MHz Output9  
ADF4113: 900 MHz Output9  
ADF4111: 836 MHz Output10  
ADF4112: 1750 MHz Output11  
ADF4112: 1750 MHz Output12  
ADF4112: 1960 MHz Output13  
ADF4113: 1960 MHz Output13  
ADF4113: 3100 MHz Output14  
−97/−106  
−98/−110  
−91/−100  
−97/−106  
−98/−110  
−91/−100  
dBc typ  
dBc typ  
dBc typ  
@ 200 kHz/400 kHz and 200 kHz PFD frequency  
@ 200 kHz/400 kHz and 200 kHz PFD frequency  
@ 200 kHz/400 kHz and 200 kHz PFD frequency  
@ 200 kHz/400 kHz and 200 kHz PFD frequency  
@ 30 kHz/60 kHz and 30 kHz PFD frequency  
@ 200 kHz/400 kHz and 200 kHz PFD frequency  
@ 10 kHz/20 kHz and 10 kHz PFD frequency  
@ 200 kHz/400 kHz and 200 kHz PFD frequency  
@ 200 kHz/400 kHz and 200 kHz PFD frequency  
@ 1 MHz/2 MHz and 1 MHz PFD frequency  
−100/−110 −100/−110 dBc typ  
−81/−84  
−88/−90  
−65/−73  
−80/−84  
−80/−84  
−80/−82  
−81/−84  
−88/−90  
−65/−73  
−80/−84  
−80/−84  
−82/−82  
dBc typ  
dBc typ  
dBc typ  
dBc typ  
dBc typ  
dBc typ  
1The B chip specifications are given as typical values.  
2This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency that  
is less than this value.  
3AC coupling ensures AVDD/2 bias. See Figure 33 for a typical circuit.  
4Guaranteed by design.  
5 TA = 25°C; AVDD = DVDD = 3 V; P = 16; SYNC = 0; DLY = 0; RFIN for ADF4110 = 540 MHz; RFIN for ADF4111, ADF4112, ADF4113 = 900 MHz.  
6 The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO, PNTOT, and subtracting 20logN (where N is the N divider  
value) and 10logFPFD: PNSYNTH = PNTOT – 10logFPFD – 20logN.  
7 The phase noise is measured with the EVAL-ADF411xEB1 evaluation board and the HP8562E spectrum analyzer. The spectrum analyzer provides the REFIN for the  
synthesizer (fREFOUT = 10 MHz @ 0 dBm). SYNC = 0; DLY = 0 (Table 7).  
8 fREFIN = 10 MHz; fPFD = 200 kHz; offset frequency = 1 kHz; fRF = 540 MHz; N = 2700; loop B/W = 20 kHz.  
9 fREFIN = 10 MHz; fPFD = 200 kHz; offset frequency = 1 kHz; fRF = 900 MHz; N = 4500; loop B/W = 20 kHz.  
10  
f
f
f
f
f
= 10 MHz; fPFD = 30 kHz; offset frequency = 300 Hz; fRF = 836 MHz; N = 27867; loop B/W = 3 kHz.  
= 10 MHz; fPFD = 200 kHz; offset frequency = 1 kHz; fRF = 1750 MHz; N = 8750; loop B/W = 20 kHz  
= 10 MHz; fPFD = 10 kHz; offset frequency = 200 Hz; fRF = 1750 MHz; N = 175000; loop B/W = 1 kHz.  
= 10 MHz; fPFD = 200 kHz; offset frequency = 1 kHz; fRF = 1960 MHz; N = 9800; loop B/W = 20 kHz.  
= 10 MHz; fPFD = 1 MHz; offset frequency = 1 kHz; fRF = 3100 MHz; N = 3100; loop B/W = 20 kHz.  
REFIN  
REFIN  
REFIN  
REFIN  
REFIN  
11  
12  
13  
14  
Rev. C | Page 4 of 28  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
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