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ADF4113BRU-REEL 参数 Datasheet PDF下载

ADF4113BRU-REEL图片预览
型号: ADF4113BRU-REEL
PDF下载: 下载PDF文件 查看货源
内容描述: [IC PLL FREQUENCY SYNTHESIZER, 4000 MHz, PDSO16, MO-153AB, TSSOP-16, PLL or Frequency Synthesis Circuit]
分类和应用: 信息通信管理光电二极管
文件页数/大小: 28 页 / 437 K
品牌: ADI [ ADI ]
 浏览型号ADF4113BRU-REEL的Datasheet PDF文件第1页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第2页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第4页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第5页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第6页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第7页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第8页浏览型号ADF4113BRU-REEL的Datasheet PDF文件第9页  
ADF4110/ADF4111/ADF4112/ADF4113  
SPECIFICATIONS  
AVDD = DVDD = 3 V ꢀ10% 5 V ꢀ10ꢁ AVDD ≤VP ≤ 6.1 Vꢁ AGND = DGND = CPGND = 1 Vꢁ RSET = 4.7 kΩꢁ dBm referred to 51 Ωꢁ TA =  
TMIN to TMAX% unless otherwise noted. Operating temperature range is as follows: B Version: −41°C to +85°C.  
Table 1.  
Parameter  
B Version  
−15/0  
B Chips1  
−15/0  
Unit  
Test Conditions/Comments  
RF CHARACTERISTICS (3 V)  
RF Input Sensitivity  
RF Input Frequency  
ADF4110  
See Figure 29 for input circuit.  
dBm min/max  
MHz min/max  
80/550  
80/550  
For lower frequencies, ensure slew rate  
(SR) > 30 V/µs.  
ADF4110  
ADF4111  
ADF4112  
ADF4112  
ADF4113  
50/550  
0.08/1.2  
0.2/3.0  
0.1/3.0  
0.2/3.7  
50/550  
0.08/1.2  
0.2/3.0  
0.1/3.0  
0.2/3.7  
MHz min/max  
GHz min/max  
GHz min/max  
GHz min/max  
GHz min/max  
Input level = −10 dBm.  
For lower frequencies, ensure SR > 30 V/µs.  
For lower frequencies, ensure SR > 75 V/µs.  
Input level = −10 dBm.  
Input level = −10 dBm. For lower frequencies,  
ensure SR > 130 V/µs.  
Maximum Allowable Prescaler Output  
Frequency2  
165  
165  
MHz max  
RF CHARACTERISTICS (5 V)  
RF Input Sensitivity  
RF Input Frequency  
ADF4110  
−10/0  
−10/0  
dBm min/max  
80/550  
0.08/1.4  
0.1/3.0  
0.2/3.7  
0.2/4.0  
80/550  
0.08/1.4  
0.1/3.0  
0.2/3.7  
0.2/4.0  
MHz min/max  
GHz min/max  
GHz min/max  
GHz min/max  
GHz min/max  
For lower frequencies, ensure SR > 50 V/µs.  
For lower frequencies, ensure SR > 50 V/µs.  
For lower frequencies, ensure SR > 75 V/µs.  
For lower frequencies, ensure SR > 130 V/µs.  
Input level = −5 dBm  
ADF4111  
ADF4112  
ADF4113  
ADF4113  
Maximum Allowable Prescaler Output  
Frequency2  
200  
200  
MHz max  
REFIN CHARACTERISTICS  
REFIN Input Frequency  
Reference Input Sensitivity  
5/104  
0.4/AVDD  
3.0/AVDD  
10  
5/104  
0.4/AVDD  
3.0/AVDD  
10  
MHz min/max  
For f < 5 MHz, ensure SR > 100 V/µs.  
V p-p min/max AVDD = 3.3 V, biased at AVDD/2. See Note 3.  
V p-p min/max AVDD = 5 V, biased at AVDD/2. See Note 3.  
pF max  
µA max  
MHz max  
REFIN Input Capacitance  
REFIN Input Current  
PHASE DETECTOR FREQUENCY4  
CHARGE PUMP  
100  
100  
55  
55  
ICP Sink/Source  
Programmable (see Table 9).  
High Value  
Low Value  
5
5
mA typ  
µA typ  
% typ  
kΩ typ  
nA typ  
% typ  
% typ  
% typ  
With RSET = 4.7 kΩ  
625  
2.5  
2.7/10  
1
2
1.5  
2
625  
2.5  
2.7/10  
1
2
1.5  
2
Absolute Accuracy  
RSET Range  
ICP 3-State Leakage Current  
Sink and Source Current Matching  
ICP vs. VCP  
With RSET = 4.7 kΩ  
See Table 9.  
0.5 V ≤ VCP ≤ VP – 0.5 V.  
0.5 V ≤ VCP ≤ VP – 0.5 V.  
VCP = VP/2.  
ICP vs. Temperature  
LOGIC INPUTS  
VINH, Input High Voltage  
VINL, Input Low Voltage  
IINH/IINL, Input Current  
CIN, Input Capacitance  
LOGIC OUTPUTS  
0.8 × DVDD  
0.2 × DVDD  
1
10  
0.8 × DVDD  
0.2 × DVDD  
1
10  
V min  
V max  
µA max  
pF max  
VOH, Output High Voltage  
VOL, Output Low Voltage  
DVDD – 0.4  
0.4  
DVDD – 0.4  
0.4  
V min  
V max  
IOH = 500 µA.  
IOL = 500 µA.  
Rev. C | Page 3 of 28  
 
 
 
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