ADE7761B
∞
The HPF in Channel V1 has an associated phase response that
is compensated for on-chip. Figure 25 and Figure 26 show the
phase error between channels with the compensation network
activated. The ADE7761B is phase compensated up to 1 kHz as
shown, which ensures a correct active harmonic power calculation
even at low power factors.
(2)
i(t) = IO + 2 × I ×sin(hωt +β )
∑
h
h
h ≠0
where:
i(t) is the instantaneous current.
IO is the dc component.
Ih is the rms value of Current Harmonic h.
βh is the phase angle of the current harmonic.
DC COMPONENT (INCLUDING ERROR TERM)
IS EXTRACTED BY THE LPF FOR ACTIVE
POWER CALCULATION
Using Equation 1 and Equation 2, the Active Power P can be
expressed in terms of its fundamental active power (P1) and
harmonic active power (PH).
V
× I
1
1
2
P = P1 + PH
where:
V
V
× I
× I
1
0
P1 = V1 × I1 cos(Φ1)
Φ1 = α1 − β1
(3)
(4)
0
1
2ω
FREQUENCY (Rad/s)
0ω
and
∞
Figure 24. Effect of Channel Offsets on the Active Power Calculation
P = V × I ×cos(Φ )
∑
H
h
h
h
h=2
Φh = αh − βh
0.30
0.25
0.20
0.15
As can be seen in Equation 4, a harmonic active power component
is generated for every harmonic provided that the harmonic is
present in both the voltage and current waveforms. The power
factor calculation was previously shown to be accurate in the
case of a pure sinusoid; therefore, the harmonic active power
must also correctly account for the power factor because it is
made up of a series of pure sinusoids.
0.10
0.05
0
Note that the input bandwidth of the analog inputs is 7 kHz
with an internal oscillator frequency of 450 kHz.
–0.05
–0.10
HPF and Offset Effects
0
100 200 300 400 500 600 700 800 900 1000
FREQUENCY (Hz)
Equation 5 shows the effect of offsets on the active power
calculation. Figure 24 shows the effect of offsets on the active
power calculation in the frequency domain.
Figure 25. Phase Error Between Channels (0 Hz to 1 kHz)
V(t) × I(t) =
0.30
0.25
0.20
0.15
0.10
(5)
(V0 +V1 × cos(ωt))×(I0 + I1 × cos(ωt)) =
V1 × I1
V0 × I1 +
+V0 × I1 × cos(ωt) +V1 × I0 × cos(ωt)
2
As shown in Equation 5 and Figure 24, an offset on Channel V1
and Channel V2 contributes a dc component after multiplication.
Because this dc component is extracted by the LPF and used to
generate the active power information, the offsets contribute
a constant error to the active power calculation. This problem is
easily avoided in the ADE7761B with the HPF in Channel V1. By
removing the offset from at least one channel, no error component
can be generated at dc by the multiplication. Error terms at cos(ωt)
are removed by the LPF and the digital-to-frequency conversion
(see the Digital-to-Frequency Conversion section).
0.05
0
–0.05
–0.10
40
45
50
55
60
65
70
FREQUENCY (Hz)
Figure 26. Phase Error Between Channels (40 Hz to 70 Hz)
Rev. 0 | Page 1ꢀ of 24
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