AD9826–SPECIFICATIONS
ANALOG SPECIFICATIONS
Parameter
MAXIMUM CONVERSION RATE
3-Channel Mode with CDS
2-Channel Mode with CDS
1-Channel Mode with CDS
ACCURACY (ENTIRE SIGNAL PATH)
ADC Resolution
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
No Missing Codes
ANALOG INPUTS
Input Signal Range (Programmable)
1
Allowable Reset Transient
1
Input Limits
2
Input Capacitance
Input Bias Current
AMPLIFIERS
PGA Gain
PGA Gain Resolution
2
PGA Gain Monotonicity
Programmable Offset
Programmable Offset Resolution
Programmable Offset Monotonicity
NOISE AND CROSSTALK
Total Output Noise @ PGA Minimum
Total Output Noise @ PGA Maximum
Channel-to-Channel Crosstalk
@ 15 MSPS
@ 6 MSPS
POWER SUPPLY REJECTION
AVDD = 5 V 0.25 V
DIFFERENTIAL VREF (at 25°C)
CAPT–CAPB
TEMPERATURE RANGE
Operating
Storage
POWER SUPPLIES
AVDD
DRVDD
OPERATING CURRENT
AVDD
DRVDD
Power-Down Mode
POWER DISSIPATION
3-Channel Mode
1-Channel Mode
–40
–65
4.75
3.0
5.0
5.0
75
5
200
400
300
(T
MIN
to T
MAX
, AVDD = 5 V, DRVDD = 5 V, CDS Mode, f
ADCCLK
= 15 MHz, f
CDSCLK1
= f
CDSCLK2
= 5 MHz, PGA
Gain = 1, Input range = 4 V p-p, unless otherwise noted.)
Min
Typ
30
30
18
16
±
16
±
0.5
Guaranteed
2.0/4.0
1.0
AVSS – 0.3
10
10
1
64
Guaranteed
–300
512
Guaranteed
3.0
9.0
70
90
0.1
2.0
+85
+150
5.25
5.25
+300
6
AVDD + 0.3
Max
Unit
MSPS
MSPS
MSPS
Bits
LSB
LSB
V p-p
V
V
pF
nA
V/V
Steps
mV
Steps
LSB rms
LSB rms
dB
dB
% FSR
V
°C
°C
V
V
mA
mA
µA
mW
mW
NOTES
1
Linear Input Signal Range is from 0 V to 4 V when the CCD’s reference level is clamped to 4 V by the AD9826’s input clamp.
4V SET BY INPUT CLAMP
(3V OPTION ALSO AVAILABLE)
1V TYP
RESET TRANSIENT
4V p-p MAX INPUT SIGNAL RANGE
GND
2
The PGA Gain is approximately “linear in dB” and follows the equation:
G
ain =
1 + 5.0
6.0
63 – G
63
where
G
is the register value.
Specifications subject to change without notice.
–2–
REV. A
AD [ ANALOG DEVICES ]
