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AD9767ASTZRL 参数 Datasheet PDF下载

AD9767ASTZRL图片预览
型号: AD9767ASTZRL
PDF下载: 下载PDF文件 查看货源
内容描述: 10位/ 12位/ 14位, 125 MSPS双通道TxDAC数字 - 模拟转换器 [10-/12-/14-Bit, 125 MSPS Dual TxDAC Digital-to-Analog Converters]
分类和应用: 转换器数模转换器
文件页数/大小: 44 页 / 643 K
品牌: ADI [ ADI ]
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AD9763/AD9765/AD9767  
TERMINOLOGY  
Data Sheet  
Linearity Error (Integral Nonlinearity or INL)  
Linearity error is defined as the maximum deviation of the  
actual analog output from the ideal output, determined by a  
straight line drawn from zero to full scale.  
Temperature Drift  
Temperature drift is specified as the maximum change from the  
ambient (25°C) value to the value at either TMIN or TMAX. For  
offset and gain drift, the drift is reported in part per million (ppm)  
of full-scale range (FSR) per degree Celsius. For reference drift,  
the drift is reported in ppm per degree Celsius (ppm/°C).  
Differential Nonlinearity (DNL)  
DNL is the measure of the variation in analog value, normalized to  
full scale, associated with a 1 LSB change in digital input code.  
Power Supply Rejection (PSR)  
PSR is the maximum change in the full-scale output as the  
supplies are varied from nominal to minimum and maximum  
specified voltages.  
Monotonicity  
A DAC is monotonic if the output either increases or remains  
constant as the digital input increases.  
Settling Time  
Offset Error  
Settling time is the time required for the output to reach and  
remain within a specified error band about its final value,  
measured from the start of the output transition.  
Offset error is the deviation of the output current from the ideal of  
zero. For IOUTA, 0 mA output is expected when the inputs are all 0s.  
For IOUTB, 0 mA output is expected when all inputs are set to 1s.  
Glitch Impulse  
Gain Error  
Asymmetrical switching times in a DAC give rise to undesired  
output transients that are quantified by a glitch impulse. It is  
specified as the net area of the glitch in picovolts per second (pV-s).  
Gain error is the difference between the actual and ideal output  
spans. The actual span is determined by the output when all inputs  
are set to 1s minus the output when all inputs are set to 0s.  
Spurious-Free Dynamic Range (SFDR)  
The difference, in decibels (dB), between the rms amplitude of  
the output signal and the peak spurious signal over the specified  
bandwidth.  
Output Compliance Range  
The output compliance range is the range of allowable voltage at  
the output of a current-output DAC. Operation beyond the  
maximum compliance limits may cause either output stage  
saturation or breakdown resulting in nonlinear performance.  
Total Harmonic Distortion (THD)  
THD is the ratio of the rms sum of the first six harmonic  
components to the rms value of the measured input signal.  
It is expressed as a percentage or in decibels (dB).  
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