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AD9220ARS 参数 Datasheet PDF下载

AD9220ARS图片预览
型号: AD9220ARS
PDF下载: 下载PDF文件 查看货源
内容描述: 完整的12位1.5 / 3.0 / 10.0 MSPS单片A / D转换器 [Complete 12-Bit 1.5/3.0/10.0 MSPS Monolithic A/D Converters]
分类和应用: 转换器
文件页数/大小: 28 页 / 353 K
品牌: ADI [ ADI ]
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AD9221/AD9223/AD9220  
Variable Input Span with VCM = 2.5 V  
1.5 V. This sets the input span to be 3 V p-p. To assure stabil-  
ity, place a 0.1 µF ceramic capacitor in parallel with R1.  
Figure 50 shows an example of the AD9221/AD9223/AD9220  
configured for an input span of 2 × VREF centered at 2.5 V. An  
external 2.5 V reference drives the VINB pin thus setting the  
common-mode voltage at 2.5 V. The input span can be inde-  
pendently set by a voltage divider consisting of R1 and R2  
which generates the VREF signal. A1 buffers this resistor net-  
work and drives VREF. Choose this op amp based on accuracy  
requirements. It is essential that a minimum of a 10 µF capaci-  
tor in parallel with a 0.1 µF low inductance ceramic capacitor  
decouple the reference output to ground.  
The common-mode voltage can be set to VREF by connecting  
VINB to VREF to provide an input span of 0 to 2 × VREF.  
Alternatively, the common-mode voltage can be set to VREF  
by connecting VINB to a low impedance 2.5 V source. For  
the example shown, the valid input single range for VINA is 1 V  
to 4 V since VINB is set to an external, low impedance 2.5 V  
source. The VREF pin should be bypassed to the REFCOM pin  
with a 10 µF tantalum capacitor in parallel with a low induc-  
tance 0.1 µF ceramic capacitor.  
2.5V+VREF  
2.5V  
2.5V–VREF  
4V  
AD9221/  
AD9223/  
AD9220  
VINA  
VINB  
VINA  
1V  
2.5V  
REF  
2.5V  
VINB  
+5V  
0.1F  
AD9220  
1.5V  
C1  
22F  
0.1F  
R1  
R2  
VREF  
R1  
2.5k⍀  
0.1F  
10F  
0.1F  
A1  
VREF  
SENSE  
R2  
5k⍀  
0.1F  
SENSE  
+5V  
REFCOM  
Figure 50. External Reference—VCM = 2.5 V (2.5 V on  
VINB, Resistor Divider to Make VREF)  
Figure 49. Resistor Programmable Reference—3 V p-p  
Input Span, VCM = 2.5 V  
Single-Ended Input with 0 to 2 
؋
 VREF Range  
Figure 51 shows an example of an external reference driving  
both VINB and VREF. In this case, both the common mode  
voltage and input span are directly dependent on the value of  
VREF. More specifically, the common mode voltage is equal to  
VREF while the input span is equal to 2 × VREF. Thus, the  
valid input range extends from 0 to 2 × VREF. For example, if  
the REF-191, a 2.048 external reference was selected, the valid  
input range extends from 0 to 4.096 V. In this case, 1 LSB of  
the AD9221/AD9223/AD9220 corresponds to 1 mV. It is es-  
sential that a minimum of a 10 µF capacitor in parallel with a  
0.1 µF low inductance ceramic capacitor decouple the reference  
output to ground.  
USING AN EXTERNAL REFERENCE  
Using an external reference may enhance the dc performance of  
the AD9221/AD9223/AD9220 by improving drift and accuracy.  
Figures 50 through 52 show examples of how to use an external  
reference with the A/D. Table III is a list of suitable voltage  
references from Analog Devices. To use an external reference,  
the user must disable the internal reference amplifier and drive  
the VREF pin. Connecting the SENSE pin to AVDD disables  
the internal reference amplifier.  
Table III. Suitable Voltage References  
Initial  
Accuracy  
% (max)  
Operating  
Current  
(A)  
2
؋
REF  
VINA  
VINB  
AD9221/  
AD9223/  
AD9220  
Output  
Voltage  
Drift  
(ppm/؇C)  
0V  
+5V  
VREF  
Internal  
AD589  
1.00  
1.235  
AD1580 1.225  
REF191 2.048  
2.50  
REF192 2.50  
26  
1.4  
N/A  
50  
50  
45  
N/A  
45  
0.1F  
10F  
0.1F  
10–100  
50–100  
5–25  
26  
5–25  
10–25  
3–7  
1.2–2.8  
0.08–0.8  
0.1–0.5  
1.4  
0.08–0.4  
0.06–0.1  
0.04–0.2  
VREF  
0.1F  
Internal  
+5V  
SENSE  
REF43  
AD780  
2.50  
2.50  
600  
1000  
Figure 51. Input Range = 0 V to 2 × VREF  
Low Cost/Power Reference  
The AD9221/AD9223/AD9220 contains an internal reference  
buffer, A2 (see Figure 35), that simplifies the drive requirements  
of an external reference. The external reference must be able to  
drive a 5 k(±20%) load. Note that the bandwidth of the ref-  
erence buffer is deliberately left small to minimize the reference  
noise contribution. As a result, it is not possible to change the  
reference voltage rapidly in this mode without the removal of  
the CAPT/CAPB Decoupling Network.  
The external reference circuit shown in Figure 52 uses a low  
cost 1.225 V external reference (e.g., AD580 or AD1580) along  
with an op amp and transistor. The 2N2222 transistor acts in  
conjunction with 1/2 of an OP282 to provide a very low imped-  
ance drive for VINB. The selected op amp need not be a high  
speed op amp and may be selected based on cost, power and  
accuracy.  
–19–  
REV. D  
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