AD9221/AD9223/AD9220
If the application requires the largest input span (i.e., 0 V to
5 V) of the AD9221/AD9223/AD9220, the op amp will require
larger supplies to drive it. Various high speed amplifiers in the
Op Amp Selection Guide of this data sheet can be selected to
accommodate a wide range of supply options. Once again,
clamping the output of the amplifier should be considered for
these applications.
500⍀*
+V
CC
0.1F
NC
1
+VREF
–VREF
500⍀*
7
0V
2
3
DC
R
S
6
A1
VINA
R **
500⍀*
0.1F
P
5
AVDD
VREF
4
AD9221/
AD9223/
AD9220
Two dc coupled op amp circuits using a noninverting and invert-
ing topology are discussed below. Although not shown, the
noninverting and inverting topologies can be easily configured
as part of an antialiasing filter by using a Sallen-Key or Multiple-
Feedback topology, respectively. An additional R-C network
can be inserted between the op amp’s output and the AD9221/
AD9223/AD9220 input to provide a real pole.
500⍀*
NC
R
S
VINB
*OPTIONAL RESISTOR NETWORK-OHMTEK ORNA500D
**OPTIONAL PULL-UP RESISTOR WHEN USING INTERNAL REFERENCE
Figure 40. Single-Ended Input With DC-Coupled Level Shift
Simple Op Amp Buffer
AC COUPLING AND INTERFACE ISSUES
In the simplest case, the input signal to the AD9221/AD9223/
AD9220 will already be biased at levels in accordance with the
selected input range. It is simply necessary to provide an ad-
equately low source impedance for the VINA and VINB analog
input pins of the A/D. Figure 39 shows the recommended
configuration for a single-ended drive using an op amp. In this
case, the op amp is shown in a noninverting unity gain configu-
ration driving the VINA pin. The internal reference drives the
VINB pin. Note that the addition of a small series resistor of
30 Ω to 50 Ω connected to VINA and VINB will be beneficial
in nearly all cases. Refer to Analog Input Operation section for
a discussion on resistor selection. Figure 39 shows the proper
connection for a 0 V to 5 V input range. Alternative single-
ended input ranges of 0 V to 2 × VREF can also be realized
with the proper configuration of VREF (refer to the Using the
Internal Reference section).
For applications where ac coupling is appropriate, the op amp’s
output can be easily level shifted to the common-mode voltage,
VCM, of the AD9221/AD9223/AD9220 via a coupling capaci-
tor. This has the advantage of allowing the op amps common-
mode level to be symmetrically biased to its midsupply level
(i.e. (VCC + VEE)/2). Op amps which operate symmetrically
with respect to their power supplies typically provide the best ac
performance as well as greatest input/output span. Hence,
various high speed/performance amplifiers which are restricted
to +5 V/–5 V operation and/or specified for +5 V single-supply
operation can be easily configured for the 5 V or 2 V input span
of the AD9221/AD9223/AD9220. The best ac distortion per-
formance is achieved when the A/D is configured for a 2 V
input span and common-mode voltage of 2.5 V. Note that
differential transformer coupling, which is another form of ac
coupling, should be considered for optimum ac performance.
+V
Simple AC Interface
5V
AD9221/
AD9223/
AD9220
Figure 41 shows a typical example of an ac-coupled, single-
ended configuration. The bias voltage shifts the bipolar,
ground-referenced input signal to approximately VREF. The
value for C1 and C2 will depend on the size of the resistor, R.
The capacitors, C1 and C2, are typically a 0.1 µF ceramic and
10 µF tantalum capacitor in parallel to achieve a low cutoff
frequency while maintaining a low impedance over a wide fre-
quency range. The combination of the capacitor and the resistor
form a high-pass filter with a high-pass –3 dB frequency deter-
mined by the equation,
R
S
0V
VINA
VINB
VREF
U1
–V
R
S
2.5V
10F
0.1F
SENSE
Figure 39. Single-Ended AD9221/AD9223/AD9220
Op Amp Drive Circuit
Op Amp with DC Level Shifting
f
–3 dB = 1/(2 × π × R × (C1 + C2))
Figure 40 shows a dc-coupled level shifting circuit employing
an op amp, A1, to sum the input signal with the desired dc
offset. Configuring the op amp in the inverting mode with the
given resistor values results in an ac signal gain of –1. If the
signal inversion is undesirable, interchange the VINA and
VINB connections to reestablish the original signal polarity.
The dc voltage at VREF sets the common-mode voltage of the
AD9221/AD9223/AD9220. For example, when VREF = 2.5 V,
the output level from the op amp will also be centered around
2.5 V. The use of ratio matched, thin-film resistor networks will
minimize gain and offset errors. Also, an optional pull-up
resistor, RP, may be used to reduce the output load on VREF
to ±1 mA.
The low impedance VREF voltage source biases both the VINB
input and provides the bias voltage for the VINA input. Figure
41 shows the VREF configured for 2.5 V thus the input range
C1
+5V
AD9221/
AD9223/
AD9220
+VREF
0V
–VREF
C2
R
R
S
V
IN
VINA
R
S
–5V
VINB
VREF
C2
C1
SENSE
Figure 41. AC-Coupled Input
of the A/D is 0 V to 5 V. Other input ranges could be selected
by changing VREF but the A/D’s distortion performance will
–15–
REV. D
ADI [ ADI ]
