Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
SCLK
1
DIN
2
16
AD7904/AD7914/AD7924
AGND
V
DRIVE
DOUT
AGND
V
IN
0
V
IN
1
03087-003
CS
3
AGND
4
AV
DD 5
AV
DD 6
REF
IN 7
AGND
8
AD7904/
AD7914/
AD7924
TOP VIEW
(Not to Scale)
15
14
13
12
11
10
9
V
IN
2
V
IN
3
Figure 3. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4, 8, 13, 16
5, 6
7
9, 10, 11,
12
Mnemonic
SCLK
DIN
CS
AGND
AV
DD
REF
IN
V
IN
3, V
IN
2,
V
IN
1, V
IN
0
Function
Serial Clock, Logic Input. SCLK provides the serial clock for accessing data from the part. This clock input is also
used as the clock source for the AD7904/AD7914/AD7924 conversion process.
Data In, Logic Input. Data to be written to the control register of the AD7904/AD7914/AD7924 is provided on
this input and is clocked into the register on the falling edge of SCLK (see the Control Register section).
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the
AD7904/AD7914/AD7924 and frames the serial data transfer.
Analog Ground. Ground reference point for all analog circuitry on the AD7904/AD7914/AD7924. All analog
input signals and any external reference signal should be referred to this AGND voltage. All AGND pins should
be connected together.
Analog Power Supply Input. The AV
DD
range for the AD7904/AD7914/AD7924 is from 2.7 V to 5.25 V. For the 0 V
to 2 × REF
IN
range, AV
DD
should be from 4.75 V to 5.25 V.
Reference Input for the AD7904/AD7914/AD7924. An external reference must be applied to this input. The
voltage range for the external reference is 2.5 V ± 1% for specified performance.
Analog Input 0 through Analog Input 3. The four single-ended analog input channels are multiplexed into the
on-chip track-and-hold. The analog input channel to be converted is selected using the address bits ADD1 and
ADD0 of the control register. The address bits, in conjunction with the SEQ1 and SEQ0 bits, allow the sequencer
to be programmed. The input range for all input channels can extend from 0 V to REF
IN
or from 0 V to 2 × REF
IN
as selected via the RANGE bit in the control register. Any unused input channels should be connected to AGND
to avoid noise pickup.
Data Out, Logic Output. The conversion result from the AD7904/AD7914/AD7924 is provided on this output as a
serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from the
AD7904 consists of two leading zeros, two address bits indicating which channel the conversion result
corresponds to, followed by the eight bits of conversion data, followed by four trailing zeros, provided MSB first.
The data stream from the AD7914 consists of two leading zeros, two address bits indicating which channel the
conversion result corresponds to, followed by the 10 bits of conversion data, followed by two trailing zeros,
provided MSB first. The data stream from the AD7924 consists of two leading zeros, two address bits indicating
which channel the conversion result corresponds to, followed by the 12 bits of conversion data, provided MSB
first. The output coding can be selected as straight binary or twos complement via the CODING bit in the
control register.
Logic Power Supply Input. The voltage supplied at this pin determines the voltage at which the serial interface
of the AD7904/AD7914/AD7924 operates.
14
DOUT
15
V
DRIVE
Rev. C | Page 11 of 32
AD [ ANALOG DEVICES ]
