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AD7846JP 参数 Datasheet PDF下载

AD7846JP图片预览
型号: AD7846JP
PDF下载: 下载PDF文件 查看货源
内容描述: LC2MOS 16位电压输出DAC [LC2MOS 16-Bit Voltage Output DAC]
分类和应用:
文件页数/大小: 16 页 / 615 K
品牌: ADI [ ADI ]
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AD7846  
ABSOLUTE MAXIMUM RATINGS1  
NOTES  
1Stresses above those listed under Absolute Maximum Ratings may cause perma-  
nent damage to the device. This is a stress rating only; functional operation of the  
device at these or any other conditions above those indicated in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect device reliability. Only one Absolute  
Maximum Rating may be applied at any one time.  
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.4 V to +17 V  
V
CC to DGND . . . . . . . . . . . . . . . –0.4 V, VDD + 0.4 V or +7 V  
(Whichever Is Lower)  
VSS to DGND . . . . . . . . . . . . . . . . . . . . . . . . . +0.4 V to –17 V  
REF+ to DGND . . . . . . . . . . . . . . . . VDD + 0.4 V, VSS – 0.4 V  
V
2VOUT may be shorted to DGND, VDD, VSS, VCC provided that the power dissipation  
of the package is not exceeded.  
VREF– to DGND . . . . . . . . . . . . . . . . VDD + 0.4 V, VSS – 0.4 V  
V
OUT to DGND2 . . . . . . . . VDD + 0.4 V, VSS – 0.4 V or 10 V  
(Whichever Is Lower)  
RIN to DGND . . . . . . . . . . . . . . . . . . VDD + 0.4 V, VSS – 0.4 V  
Digital Input Voltage to DGND . . . . . . –0.4 V to VCC + 0.4 V  
Digital Output Voltage to DGND . . . . . –0.4 V to VCC + 0.4 V  
Power Dissipation (Any Package)  
To +75°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 mW  
Derates above +75°C . . . . . . . . . . . . . . . . . . . . . 10 mW/°C  
Operating Temperature Range  
J, K Versions . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C  
A, B Versions . . . . . . . . . . . . . . . . . . . . . . . –25°C to +85°C  
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C  
Lead Temperature (Soldering) . . . . . . . . . . . . . . . . . . +300°C  
ORDERING GUIDE  
Model  
Temperature Range  
Relative Accuracy  
Package Description  
Package Options  
AD7846JN  
AD7846KN  
AD7846JP  
AD7846KP  
AD7846AP  
AD7846AQ  
AD7846BP  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
16 LSB  
8 LSB  
16 LSB  
8 LSB  
16 LSB  
16 LSB  
8 LSB  
Plastic DIP  
Plastic DIP  
Plastic Leaded Chip Carrier (PLCC)  
Plastic Leaded Chip Carrier (PLCC)  
Plastic Leaded Chip Carrier (PLCC)  
Ceramic DIP  
N-28A  
N-28A  
P-28A  
P-28A  
P-28A  
Q-28  
Plastic Leaded Chip Carrier (PLCC)  
P-28A  
CAUTION  
ESD (electrostatic discharge) sensitive device. The digital control inputs are diode protected;  
however, permanent damage may occur on unconnected devices subject to high energy electro-  
static fields. Unused devices must be stored in conductive foam or shunts. The protective foam  
should be discharged to the destination socket before devices are removed.  
WARNING!  
ESD SENSITIVE DEVICE  
Offset Error  
TERMINOLOGY  
This is the error present at the device output with all 0s loaded  
in the DAC. It is due to op amp input offset voltage and bias  
current and the DAC leakage current.  
LEAST SIGNIFICANT BIT  
This is the analog weighting of 1 bit of the digital word in a DAC.  
For the AD7846, 1 LSB = (VREF+ – VREF–)/216.  
Bipolar Zero Error  
Relative Accuracy  
When the AD7846 is connected for bipolar output and 10 . . . 000  
is loaded to the DAC, the deviation of the analog output from the  
ideal midscale of 0 V is called the bipolar zero error.  
Relative accuracy or endpoint nonlinearity is a measure of the  
maximum deviation from a straight line passing through the end-  
points of the DAC transfer function. It is measured after adjust-  
ing for both endpoints (i.e., offset and gain errors are adjusted  
out) and is normally expressed in least significant bits or as a  
percentage of full-scale range.  
Digital-to-Analog Glitch Impulse  
This is the amount of charge injected from the digital inputs to  
the analog output when the inputs change state. This is normally  
specified as the area of the glitch in either pA-secs or nV-secs  
depending upon whether the glitch is measured as a current or a  
voltage.  
Differential Nonlinearity  
Differential nonlinearity is the difference between the measured  
change and the ideal change between any two adjacent codes. A  
specified differential nonlinearity of 1 LSB over the operating  
temperature range ensures monotonicity.  
Multiplying Feedthrough Error  
This is an ac error due to capacitive feedthrough from either of  
the VREF terminals to VOUT when the DAC is loaded with all 0s.  
Gain Error  
Digital Feedthrough  
Gain error is a measure of the output error between an ideal  
DAC and the actual device output with all 1s loaded after offset  
error has been adjusted out. Gain error is adjustable to zero  
with an external potentiometer.  
When the DAC is not selected (i.e., CS is held high), high fre-  
quency logic activity on the digital inputs is capacitively coupled  
through the device to show up as noise on the VOUT pin. This  
noise is digital feedthrough.  
–4–  
REV. E  
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