AD7545A–SPECIFICATIONS
(V
Parameter
STATIC PERFORMANCE
Resolution
Relative Accuracy
Differential Nonlinearity
Gain Error
Gain Temperature Coefficient
2
∆Gain/∆Temperature
DC Supply Rejection
2
∆Gain/∆V
DD
Output Leakage Current at OUT1
Version
All
K, B, T
L, C, U
All
K, B, T
L, C, U
All
All
All
K, L
B, C
T, U
All
12
±
1/2
±
1/2
±
1
±
3
±
1
±
5
±
2
0.002
10
10
10
1
12
±
1/2
±
1/2
±
1
±
4
±
2
±
5
±
2
REF
=
10 V, V
OUT1
= O V, AGND = DGND unless otherwise noted)
V
DD
= +15 V
Limits
T
A
= + 25 C T
MIN
–T
MAX1
12
±
1/2
±
1/2
±
1
±
3
±
1
±
5
±
2
0.002
10
10
10
1
12
±
1/2
±
1/2
±
1
±
4
±
2
±
5
±
2
0.004
50
50
200
1
V
DD
= +5 V
Limits
T
A
= + 25 C T
MIN
–T
MAX1
Units
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
ppm/°C max
ppm/°C typ
% per % max
nA max
nA max
nA max
µs
max
Test Conditions/Comments
Endpoint Measurement
All Grades Guaranteed 12-Bit
Monotonic Over Temperature
Measured Using Internal R
FB
.
DAC Register Loaded with All 1s.
0.004
50
50
200
1
∆V
DD
=
±
5%
DB0–DB11 = 0 V;
WR, CS
= 0 V
DYNAMIC PERFORMANCE
Current Settling Time
2
To 1/2 LSB. OUT1 Load = 100
Ω,
C
EXT
= 13 pF. DAC Output Measured
from Falling Edge of
WR, CS
= 0 V.
Propagation Delay
2
(from Digital
Input Change to 90%
of Final Analog Output)
Digital-to-Analog Glitch Impulse
AC Feedthrough
2, 4
At OUT1
REFERENCE INPUT
Input Resistance
(Pin 19 to GND)
ANALOG OUTPUTS
Output Capacitance
2
C
OUT1
C
OUT1
DIGITAL INPUTS
Input High Voltage
V
IH
Input Low Voltage
V
IL
Input Current
5
I
IN
Input Capacitance
2
DB0–DB11,
WR, CS
SWITCHING CHARACTERISTICS
Chip Select to Write Setup Time
t
CS
Chip Select to Write Hold Time
t
CH
Write Pulse Width
t
WR
Data Setup Time
t
DS
Data Hold Time
t
DH
POWER SUPPLY
V
DD
I
DD
2
All
All
200
5
–
–
150
5
–
–
ns max
nV sec typ
OUT1 Load = 100
Ω,
C
EXT
= 13 pF
3
V
REF
= AGND. OUT1 Load = 100
Ω,
Alternately Loaded with All 0s and 1s.
V
REF
=
±
10 V, 10 kHz Sine Wave
Input Resistance TC = –300 ppm/°C typ
Typical Input Resistance = 15 kΩ
All
All
5
10
20
5
10
20
5
10
20
5
10
20
mV p-p typ
kΩ min
kΩ max
All
70
150
70
150
70
150
70
150
pF max
pF max
DB0–DB11 = 0 V,
WR, CS
= 0 V
DB0–DB11 = V
DD
,
WR, CS
= 0 V
All
All
All
All
K, B, L, C
T, U
All
K, B, L, C
T, U
All
All
All
All
2.4
0.8
±
1
8
100
100
0
100
100
100
5
5
2
100
10
2.4
0.8
±
10
8
130
170
0
130
170
150
5
5
2
100
10
13.5
1.5
±
1
8
75
75
0
75
75
60
5
15
2
100
10
13.5
1.5
±
10
8
85
95
0
85
95
80
5
15
2
100
10
V min
V max
µA
max
pF max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
V
mA max
µA
max
µA
typ
±
5% For Specified Performance
All Digital Inputs V
IL
or V
IH
All Digital Inputs 0 V or V
DD
All Digital Inputs 0 V or V
DD
See Timing Diagram
V
IN
= 0 or V
DD
t
CS
≥
t
WR
, T
CH
≥
0
NOTES
1
Temperature range as follows: K, L Versions = 0°C to +70°C; B, C Versions = –25°C to +85°C; T, U Versions = –55°C to +125°C.
2
Sample tested to ensure compliance.
3
DB0–DB11 = 0 V to V
DD
or V
DD
to 0 V.
4
Feedthrough can be further reduced by connecting the metal lid on the ceramic package to DGND.
6
Logic inputs are MOS gates. Typical input current (+25°C) is less than 1 nA.
Specifications subject to change without notice.
–2–
REV. C
AD [ ANALOG DEVICES ]
