AD6620
TIMING CHARACTERISTICS (C
LOAD = 40 pF All Outputs)
Test
Level
AD6620AS
Typ
Parameter (Conditions)
Temp
Min
Max
Unit
MICROPROCESSOR PORT, MODE = 0
MODE0 Input Timing Requirements:
tSC
tHC
tHA
tZR
tZD
tSAM
Control1 to CLK Setup Time
Control1 to CLK Hold Time
Address2 to CLK Hold Time
CS to Data Enabled Time
CS to Data Disabled Time
CS to Address/Data Setup Time
Full
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
IV
3.0
5.0
3.0
ns
ns
ns
ns
ns
ns
5.0
5.0
0.0
MODE0 Read Switching Characteristics:
tDD
CLK to Data Valid Time
Full
Full
I
IV
10.0
4.0
15.0
30.0
19.5
ns
ns
tRDY
RD to RDY Time
MODE0 Write Timing Requirements:
tSC
Control1 to CLK Setup Time
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
3.0
5.0
3.0
3.0
0.0
ns
ns
ns
ns
ns
tHC
tHM
tHA
tSAM
Control1 to CLK Hold Time
Micro Data3 to CLK Hold Time
Address2 to CLK Hold Time
Address/Data Setup Time to CS
MODE0 Write Switching Characteristics:
tRDY RD to RDY Time
Full
IV
4.0
19.5
ns
MICROPROCESSOR PORT, MODE = 1
MODE1 Input Timing Requirements:
tSC
tHC
tHA
tZR
Control1 to CLK Setup Time
Control1 to CLK Hold Time
Address2 to CLK Hold Time
CS to Data Enabled Time
CS to Data Disabled Time
Address/Data Setup Time to CS
Full
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
IV
3.0
5.0
3.0
ns
ns
ns
ns
ns
ns
5.0
5.0
tZD
tSAM
0.0
MODE1 Read Switching Characteristics:
tDD
CLK to Data Valid Time
CLK to DTACK Time
Full
Full
I
V
10.0
5.5
30.0
15.5
ns
ns
tDTACK
MODE1 Write Timing Requirements:
tSC
Control1 to CLK Setup Time
Full
Full
Full
Full
Full
IV
IV
IV
IV
IV
0.0
5.0
6.5
3.0
0.0
ns
ns
ns
ns
ns
tHC
tHM
tHA
tSAM
Control1 to CLK Hold Time
Micro Data3 to CLK Hold Time
Address2 to CLK Hold Time
Address/Data Setup Time to CS
MODE1 Write Switching Characteristic:
tDTACK
CLK to DTACK Time
Full
V
5.5
15.5
ns
NOTES
1Specification pertains to: R/W (WR), DS (RD), CS.
2Specification pertains to: A[2:0].
3Specification pertains to: D[7:0].
Specifications subject to change without notice.
REV. A
–6–
ADI [ ADI ]
