AD6600
AD6600 TIMING DIAGRAMS
t
ENCH
ENCODE
t
ENCL
t
ENC
t
CF1
CLK2
CLK2 2
t
CR1
t
CLK2
L
t
CF2
CLK2 1
t
CR2
t
CLK2
t
CLK2
L
2
t
CLK2
t
CLK2
H1
1
t
CLK2
H2
CLK2 2
CLK2 1
CLK2 2
t
2
t
2
D [10:0]
RSSI [2:0]
1_DRL
1_DFL
t
2
AB_OUT
t
2
1_ARL
1_AFL
Figure 8. Encode to CLK2
Delays and CLK2
Propagation Delays
t
ENCH
ENCODE
t
ENCL
t
ENC
t
CF1
CLK2
CLK2 2
t
CR1
t
CLK2
L
t
CF2
CLK2 1
t
CR2
t
CLK2
t
CLK2
L
2
t
CLK2
t
CLK2
H1
1
t
CLK2
CLK2 2
H2
CLK2 1
CLK2 2
t
H_D2
D [10:0]
RSSI [2:0]
t
S_D2
t
H_D2
t
S_D2
t
H_A2
t
S_A2
t
H_A2
t
S_A2
AB_OUT
Figure 9. CLK2
Setup-and-Hold Time Characteristics
t
ENCH
ENCODE
ENCODE
t
ENCL
ENCODE
t
ENC
ENCODE
2
t
CF1
CLK2
CLK2 2
t
CR1
t
CLK2
L
t
CF2
CLK2 1
t
CR2
t
CLK2
t
CLK2
L
t
CLK2
t
CLK2
H1
1
t
CLK2
H2
CLK2 2
CLK2 1
CLK2 2
t
EN_DFL
t
EN_DRL
D [10:0]
RSSI [2:0]
t
EN_AFL
t
EN_ARL
AB_OUT
Figure 10. Encode to CLK2
Delays and Encode Propagation Delays
REV. 0
–13–
AD [ ANALOG DEVICES ]
