AD6600
DEFINITIONS OF SPECIFICATIONS
Analog Bandwidth
Full-Scale Gain Tolerance
Unit-to-unit variation in full-scale input power.
Full-Scale Input Power
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB. The bandwidth is determined by the internal
track-and-hold when the filter node is resonated.
Aperture Delay
Expressed in dBm. Computed using the following equation:
V
2
FULL SCALE rms
Z
INPUT
=
10 log
0.001
The delay between the 50% point of the rising edge of the
ENCODE command and the instant at which the analog input-
is sampled.
Aperture Uncertainty (Jitter)
Power
FULL SCALE
The sample-to-sample variation in aperture delay.
Attenuator 3OIP
Gain Matching (Input A:B)
Variation in full-scale power between A and B inputs.
Harmonic Distortion, 2nd
The third order intercept point of the front end of the AD6600.
It is the point at which the third order products would theoreti-
cally intercept the input signal level if the input level could increase
without bounds. This is measured using the ADC within the
AD6600 while the input is stimulated with dual tones in the
minimum attenuation (i.e., maximum gain) range.
Channel Isolation
The ratio of the rms signal amplitude to the rms value of the
second harmonic component, reported in dBc.
Harmonic Distortion, 3rd
The ratio of the rms signal amplitude to the rms value of the
third harmonic component, reported in dBc.
Integral Nonlinearity
The amount of signal leakage from one channel to the next
when one channel is driven with a full-scale input, and the other
channel is swept from –20 dBFS to –90 dBFS with a frequency
offset. The leakage is measured on the side with the smaller signal.
Differential Analog Input Resistance, Differential Analog
Input Capacitance and Differential Analog Input Impedance
The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a “best straight line”
determined by a least square curve fit.
Minimum Conversion Rate
The encode rate at which the SNR of the lowest analog signal fre-
quency drops by no more than 3 dB below the guaranteed limit.
Maximum Conversion Rate
The real and complex impedances measured at each analog
input port. The resistance is measured statically and the capaci-
tance and differential input impedances are measured with a
network analyzer.
Differential Analog Input Voltage Range
The encode rate at which parametric testing is performed.
Noise (For Any Range Within the ADC)
FS
dBm
−
SNR
dBc
−
Signal
dBFS
10
The peak-to-peak differential voltage that must be applied to the
converter to generate a full-scale response. Peak differential
voltage is computed by observing the voltage on a single pin and
subtracting the voltage from the other pin, which is 180 degrees
out of phase. Peak-to-peak differential is computed by rotating
the inputs phase 180 degrees and taking the peak measurement
again. The difference is then computed between both peak
measurements.
Differential Nonlinearity
V
NOISE
=
Z
×
0.001
×
10
where:
Z
FS
SNR
Signal
is the input impedance,
is the full-scale of the device for the frequency in question,
is the value for the particular input level,
is the signal level within the ADC reported in dB below
full scale. This value includes both thermal and quanti-
zation noise.
The deviation of any code width from an ideal 1 LSB step.
Differential Resonant Port Resistance
Range-Range Gain Tolerance
The resistance shunted across the resonant port (nominally
630
Ω).
Used to determine the filter bandwidth and gain of
that stage.
Encode Pulsewidth/Duty Cycle
The gain error in the RSSI attenuator ladder from one range to
the next.
Range-Range Phase Tolerance
The phase error in the RSSI attenuator ladder from one range
to the next.
Differential Resonant Port Capacitance
Pulsewidth high is the minimum amount of time that the
ENCODE pulse should be left in logic “1” state to achieve rated
performance; pulsewidth low is the minimum time ENCODE
pulse should be left in low state. See timing implications of
changing t
ENCH
in text. At a given clock rate, these specifications
define an acceptable Encode duty cycle.
The capacitance between the two resonant pins. Used to deter-
mine filter bandwidth and resonant frequency.
–10–
REV. 0
AD [ ANALOG DEVICES ]
