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AD1858JRS 参数 Datasheet PDF下载

AD1858JRS图片预览
型号: AD1858JRS
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声,单电源16-, 18-和20位Σ-Δ型DAC的 [Stereo, Single Supply 16-, 18- and 20-Bit Sigma-Delta DACs]
分类和应用: 消费电路商用集成电路光电二极管
文件页数/大小: 16 页 / 265 K
品牌: ADI [ ADI ]
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AD1857/AD1858–SPECIFICATIONS  
TEST CO ND ITIO NS UNLESS O TH ERWISE NO TED  
Supply Voltages (AVDD, DVDD  
Ambient T emperature  
)
+5.0 V  
25°C  
Input Clock (FMCLK  
Input Signal  
)
11.2896 MHz (256 × FS Mode)  
1.0013 kHz  
–0.5 dB Full Scale  
44.1 kHz  
20 Hz to 20 kHz  
18 Bits  
Input Sample Rate  
Measurement Bandwidth  
AD1857 Input Data Wordwidth  
AD1858 Input Data Wordwidth  
Load Capacitance  
16 Bits  
100 pF  
Load Impedance  
47 kΩ  
Input Voltage HI (VIH  
)
2.4 V  
Input Voltage LO (VIL)  
0.8 V  
I2S-Justified Mode (Ref. Figure 7) for AD1857, Right-Justified Mode (Ref. Figure 8) for AD1858.  
Performance of the right and left channels are identical (exclusive of the Interchannel Gain Mismatch and Interchannel Phase Deviation specifications).  
Values in bold typeface are tested, all others are guaranteed, not tested.  
ANALO G P ERFO RMANCE  
Min  
Typ  
Max  
Units  
AD1857 Resolution  
AD1858 Resolution  
18  
16  
Bits  
Bits  
Dynamic Range (20 Hz to 20 kHz, –60 dB Input)  
No A-Weight Filter  
With A-Weight Filter  
91  
94  
–90  
0.003  
dB  
dB  
dB  
%
T otal Harmonic Distortion + Noise  
–85  
0.006  
Analog Outputs  
Single-Ended Output Range (± Full Scale)  
Output Impedance at Each Output Pin  
Output Capacitance at Each Output Pin  
Out-of-Band Energy (0.5 × FS to 100 kHz)  
CMOUT  
2.8  
3.0  
<200  
3.2  
V p-p  
pF  
dB  
V
20  
–72.5  
2.4  
2.1  
2.25  
DC Accuracy  
Gain Error  
Interchannel Gain Mismatch  
Gain Drift  
Interchannel Crosstalk (EIAJ method)  
Interchannel Phase Deviation  
Mute Attenuation  
±3.0  
0.01  
150  
–120  
±0.1  
–100  
؎7.5  
؎0.2  
300  
%
dB  
ppm/°C  
dB  
Degrees  
dB  
–100  
–90  
De-emphasis Gain Error  
±0.1  
dB  
D IGITAL I/O  
Min  
Max  
Units  
Input Voltage HI (VIH  
)
2.4  
V
Input Voltage LO (VIL)  
0.8  
10  
10  
20  
V
Input Leakage (IIH @ VIH = 2.4 V)  
Input Leakage (IIL @ VIL = 0.8 V)  
Input Capacitance  
µA  
µA  
pF  
REV. 0  
–2–  
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