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AD1847JP 参数 Datasheet PDF下载

AD1847JP图片预览
型号: AD1847JP
PDF下载: 下载PDF文件 查看货源
内容描述: 串行端口16位SoundPort立体声编解码器 [Serial-Port 16-Bit SoundPort Stereo Codec]
分类和应用: 解码器编解码器商用集成电路
文件页数/大小: 28 页 / 313 K
品牌: ADI [ ADI ]
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AD1847  
T he crystals shown in the crystal connection circuitry of Figure  
21 should be fundamental-mode and parallel-tuned. T wo  
sources for the exact crystals specified are Component Market-  
ing Services in Massachusetts, U.S. at 617/762-4339 and  
Cardinal Components in New Jersey, U.S. at 201/746-0333.  
Note that using the exact data sheet frequencies is not required  
and that external clock sources can be used to overdrive the  
AD1847s internal oscillators. (See the description of the CFS2:0  
control bits above.) If using an external clock source, apply it to  
the crystal input pins while leaving the crystal output pins un-  
connected. Attention should be paid to providing low-jitter ex-  
ternal input clocks .  
Analog Devices recommends a split ground plane as shown in  
Figure 23. T he analog plane and the digital plane are connected  
directly under the AD1847. Splitting the ground plane directly  
under the SoundPort Codec is optimal because analog pins will  
be located directly above the analog ground plane and digital  
pins will be located directly above the digital ground plane for  
the best isolation. T he digital and analog grounds should be tied  
together in the vicinity of the AD1847. Other schemes may also  
yield satisfactory results. If the split ground plane recommended  
here is not possible, the AD1847 should be entirely over the  
analog ground plane with the ASIC and DSP over the digital  
plane.  
XTAL1I  
XTAL1O  
XTAL2I  
XTAL2O  
DIGITAL  
GROUND  
PLANE  
ANALOG  
GROUND  
PLANE  
BM  
L_AUX2  
20 64pF  
20 64pF  
20 64pF  
20 64pF  
24.576MHz  
16.9344MHz  
AD1847  
Figure 21. Crystal Connections  
Analog Devices also recommends a pull-down resistor on the  
PWRDOWN signal.  
V
PWRDOWN  
CC  
Good, standard engineering practices should be applied for  
power-supply decoupling. Decoupling capacitors should be  
placed as close as possible to package pins. If a separate analog  
power supply is not available, the circuit shown in Figure 22 is  
recommended when using a single +5 V supply. Ferrite beads  
suffice for the inductors shown. T his circuitry should be as close  
to the supply pins as is practical.  
Figure 23. Recom m ended Ground Plane  
FERRITE  
+5V SUPPLY  
1µF  
0.1µF  
0.1µF  
0.1µF  
0.1µF  
0.1µF  
V
V
V
V
DD  
DD  
DD  
DD  
1.6  
FERRITE  
1µF  
0.1µF  
1µF  
0.1µF  
V
V
CC  
CC  
Figure 22. Recom m ended Power Supply Bypassing  
REV. B  
–25–  
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