AD7013
Parameter
AD7013A
Units
Test Conditions/Comments
AUXILIARY SECTION
AUX DAC1 AUX DAC2 AUX DAC3
Resolution
DC Accuracy
Integral
10
8
8
Bits
±3
–1.5/+4
±1
±1
±1
±1
LSBs max
LSBs max
Differential
AUX DAC2 & AUX DAC3 Guaranteed
Monotonic
Zero Code Leakage
Gain Error
Output Full-Scale Current
Output Impedance4
Output Voltage Compliance
Coding
±500
±7.5
566
±500
±7.5
280
2
2.6
Binary
Yes
±500
±7.5
280
nA max
% max
µA
MΩ typ
Volts max
RSET = 18 kΩ
Power Down Option
REFERENCE SPECIFICATIONS
VREF
1.23
±5
20
Volts typ
% max
kΩ typ
Reference Accuracy
Reference Impedance
LOGIC INPUTS
VINH, Input High Voltage
VDD–0.9
0.9
10
V min
V
INL, Input Low Voltage
V max
µA max
pF max
IINH, Input Current
CIN, Input Capacitance
10
LOGIC OUTPUTS
V
OH, Output High Voltage
VDD–0.4
0.4
V min
V max
|IOUT| ≤ 40 µA
|IOUT| ≤ 1.6 mA
VOL, Output Low Voltage
POWER SUPPLIES
VDD
4.5/5.5
VMIN/VMAX
5
IDD
All Sections Active
10.5
9
mA max
mA typ
CR14 = CR15 = CR16 = CR17 = 1
MCLK = 6.2208 MHz; 80 pF
Load on DxCLK
ADCs Active Only
8.6
mA max
CR14 = 1; CR15 = CR16 = CR17 = 0
MCLK = 6.2208 MHz; 80 pF
Load on DxCLK
AUX DACs Active Only
10-Bit AUX DAC Active
All Sections Powered Down6
2.2
1.6
2
mA max
mA max
mA max
CR14 = 0; CR15 = CR16 = CR17 = 1;
MCLK Inactive, MCLK = 0 V
CR14 = CR15 = CR16 = 0; CR17 = 1;
MCLK Inactive, MCLK = 0 V
CR14 = CR15 = CR16 = CR17 = 0
MCLK = 6.2208 MHz; 80 pF
Load on DxCLK
30
10
µA typ
MCLK =100 kHz; 80 pF
Load on DxCLK
MCLK Inactive, MCLK = 0 V
µA max
NOTES
1Operating temperature ranges as follows: A version: –40°C to +85°C.
2SNR calculation includes noise and distortion components.
3See Terminology.
4Sampled tested only.
5Measured while the digital inputs are static and equal to 0 V or VDD
.
6With all sections powered down, IDD is proportional to the capacitive load on DxCLK. For example, IDD is typically 1.7 mA with 80 pF load and 600 µA with
10 pF load.
Specifications subject to change without notice.
REV. A
–3–
ADI [ ADI ]
