a
FEATURES
Single +5 V Supply
Receive Channel
Differential or Single-Ended Analog Inputs
Auxiliary Set of Analog I & Q Inputs
Two Sigma-Delta A/D Converters
Choice of Two Digital FIR Filters
Root-Raised-Cosine Rx Filters,
α
= 0.35
Brick Wall FIR Rx Filters
On-Chip or User Rx Offset Calibration
ADC Sampling Vernier
Three Auxiliary DACs
On-Chip Voltage Reference
Low Active Power Dissipation, Typical 45 mW
Low Sleep Mode Power Dissipation, <50
µW
28-Pin SSOP
APPLICATIONS
American TIA Digital Cellular Telephony
American Analog Cellular Telephony
Digital Baseband Receivers
GENERAL DESCRIPTION
The AD7013 is a complete low power, CMOS, TIA IS-54 base-
band receive port with single +5 V power supply. The part is
CMOS
TIA IS-54 Baseband Receive Port
AD7013
designed to perform the baseband conversion of I and Q
waveforms in accordance with the American (TIA IS-54)
Digital Cellular Telephone system.
The receive path consists of two high performance sigma-delta
ADCs, each followed by a FIR digital filter. A primary and
auxiliary set of IQ differential analog inputs are provided,
where either can be selected as inputs to the sigma-delta
ADCs. Also, a choice of two frequency responses are available
for the receive FIR filters; a Root-Raised-Cosine filter for
digital mode or a brick wall response for analog mode.
Differential analog inputs are provided for both I and Q
channels. On-chip calibration logic is also provided to remove
either on-chip offsets or remove system offsets. A 16-bit serial
interface is provided, interfacing easily to most DSPs. The
receive path also provides a means to vary the sampling
instant, giving a resolution to 1/32 of a symbol interval.
The auxiliary section provides two 8-bit DACs and one 10-bit
DAC for functions such as automatic gain control (AGC),
automatic frequency control (AFC) and power amplifier
control.
As it is a necessity for all digital mobile systems to use the
lowest possible power, the device has receive and auxiliary
power down options. The AD7013 is housed in a space
efficient 28-pin SSOP (Shrink Small Outline Package).
FUNCTIONAL BLOCK DIAGRAM
MCLK
DGND
V
DD
AUX DAC1
AUX DAC2
AUX DAC3
FS ADJUST
V
AA
AGND
DxCLK
DATA IN
FRAME IN
MODE1
FRAME OUT
SERIAL
INTERFACE
10-BIT
AUX DAC
8-BIT
AUX DAC
8-BIT
AUX DAC
FULL-SCALE
ADJUST
AGND
AGND
LATCH
LATCH
LATCH
AD7013
1.23V
REFERENCE
ANALOG MODE
FIR DIGITAL FILTER
ROOT RAISED COSINE
FIR DIGITAL FILTER
BYPASS
IRx
∆Σ–∆
MODULATOR
SWITCHED
CAP FILTER
IRx
MUX
AUX IRx
AUX IRx
QRx
OFFSET
ADJUST
ANALOG MODE
FIR DIGITAL FILTER
ROOT RAISED COSINE
FIR DIGITAL FILTER
∆Σ–∆
MODULATOR
SWITCHED
CAP FILTER
QRx
MUX
AUX QRx
AUX QRx
Rx CLK
RECEIVE
CHANNEL
SERIAL
INTERFACE
OFFSET
ADJUST
Rx DATA
Rx FRAME
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
AD [ ANALOG DEVICES ]
