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5962-9322201MEA 参数 Datasheet PDF下载

5962-9322201MEA图片预览
型号: 5962-9322201MEA
PDF下载: 下载PDF文件 查看货源
内容描述: [Monolithic Synchronous Voltage-to-Frequency Converter]
分类和应用: 转换器
文件页数/大小: 28 页 / 594 K
品牌: ADI [ ADI ]
 浏览型号5962-9322201MEA的Datasheet PDF文件第3页浏览型号5962-9322201MEA的Datasheet PDF文件第4页浏览型号5962-9322201MEA的Datasheet PDF文件第5页浏览型号5962-9322201MEA的Datasheet PDF文件第6页浏览型号5962-9322201MEA的Datasheet PDF文件第8页浏览型号5962-9322201MEA的Datasheet PDF文件第9页浏览型号5962-9322201MEA的Datasheet PDF文件第10页浏览型号5962-9322201MEA的Datasheet PDF文件第11页  
AD652  
CLOCK IN  
D FLOP  
R
IN  
COMPARATOR  
C
INT  
LATCH  
V
IN  
ONE  
SHOT  
CK  
Q
G
Q
Q
D
D
AND  
INTEGRATOR  
C
OS  
5V  
H
L
1mA  
–V  
S
INTEGRATOR  
OUTPUT  
THRESHOLD  
CLOCK  
COMPARATOR  
OUT  
AND  
OUT  
D FLOP  
OUT  
LATCH  
OUT  
FREQ  
OUT  
tOS  
tOS  
Figure 4. Block Diagram and System Waveforms  
Figure 4 shows that the period between output pulses is  
constrained to be an exact multiple of the clock period.  
Consider an input current of exactly one quarter the value of  
the reference current. In order to achieve a charge balance, the  
output frequency equals the clock frequency divided by four:  
one clock period for reset and three clock periods of integrate.  
This is shown in Figure 5. If the input current is increased by a  
very small amount, the output frequency should also increase  
by a very small amount. Initially, however, no output change is  
observed for a very small increase in the input current. The  
output frequency continues to run at one quarter of the clock,  
delivering an average of 250 µA to the summing junction. Since  
the input current is slightly larger than this, charge accumulates  
in the integrator and the sawtooth signal starts to drift down-  
ward. As the integrator sawtooth drifts down, the comparator  
threshold is crossed earlier and earlier in each successive cycle,  
until finally, a whole cycle is lost. When the cycle is lost, the  
integrate phase lasts for two periods of the clock instead of the  
usual three periods. Thus, among a long string of divide-by-  
fours, an occasional divide-by-three occurs; the average of the  
output frequency is very close to one quarter of the clock, but  
the instantaneous frequency can be very different.  
INTEGRATOR  
OUT  
THRESHOLD  
CLOCK  
Figure 5. Integrator Output for IIN = 250 µA  
Because of this, it is very difficult to observe the waveform on  
an oscilloscope. During all of this time, the signal at the output  
of the integrator is a sawtooth wave with an envelope that is also  
a sawtooth. See Figure 6.  
200µs/BOX  
C
INT  
100µs/BOX  
FREQ OUT  
10µs/BOX  
CLOCK IN  
10µs/BOX  
Figure 6. Integrator Output for IIN Slightly Greater than 250 µs  
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