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5962-9322201MEA 参数 Datasheet PDF下载

5962-9322201MEA图片预览
型号: 5962-9322201MEA
PDF下载: 下载PDF文件 查看货源
内容描述: [Monolithic Synchronous Voltage-to-Frequency Converter]
分类和应用: 转换器
文件页数/大小: 28 页 / 594 K
品牌: ADI [ ADI ]
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AD652  
SPECIFICATIONS  
Typical @ TA = 25°C, VS = 15 V, unless otherwise noted. Specifications in boldface are 100% tested at final test and are used to measure  
outgoing quality levels.  
Table 1.  
AD652JP/AQ/SQ  
AD652KP/BQ  
Parameter  
Min  
Typ  
Max  
Min  
Typ  
Max  
Unit  
VOLTAGE-TO-FREQUENCY MODE  
Gain Error  
fCLOCK= 200 kHz  
fCLOCK = ± MHz  
fCLOCK = 4 MHz  
±0.ꢀ  
±0.ꢀ  
±0.ꢀ  
±±  
1
1.5  
±0.2ꢀ  
±0.2ꢀ  
±0.2ꢀ  
±0.ꢀ  
0.5  
0.75  
%
%
%
Gain Temperature Coefficient  
fCLOCK = 200 kHz  
fCLOCK = ± MHz  
±2ꢀ  
±2ꢀ  
±±0  
±2ꢀ  
0.00±  
±ꢀ0  
50  
50  
75  
0.01  
±±ꢀ  
±±ꢀ  
±±0  
±±ꢀ  
0.00±  
±2ꢀ  
25  
30  
50  
0.01  
ppm/°C  
ppm/°C  
ppm/°C±  
ppm/°C  
%/V  
fCLOCK = 4 MHz  
Power Supply Rejection Ratio  
Linearity Error  
fCLOCK = 200 kHz  
fCLOCK = ± MHz  
fCLOCK = 2 MHz  
fCLOCK = 4 MHz  
Offset (Transfer Function, RTI)  
Offset Temperature Coefficient  
Response Time  
±0.002  
±0.002  
±0.0±  
±0.02  
± ±  
±0.02  
0.02  
±0.02  
0.05  
3
±0.002  
±0.002  
±0.002  
±0.0±  
±±  
±0.00ꢀ  
0.005  
±0.00ꢀ  
0.02  
2
%
%
%
%
mV  
µV/°C  
±±0  
±±0  
50  
25  
One Period of New Output Frequency Plus One Clock Period.  
FREQUENCY-TO-VOLTAGE MODE  
Gain Error, fIN = ±00 kHz FS  
Linearity Error, fIN = ±00 kHz FS  
INPUT RESISTORS  
±0.ꢀ  
±0.002  
±±  
±0.02  
±0.2ꢀ  
±0.002  
±0.ꢀ  
±0.0±  
%
%
CERDIP (Figure 2)(0 to ±0 V FS Range)  
PLCC (Figure 3)  
±9.8  
20  
20.2  
±9.8  
20  
20.2  
kΩ  
Pin 8 to Pin 7  
9.9  
9.9  
±9.8  
±ꢀ.8  
±9.8  
±0  
±0  
20  
±6  
20  
±ꢀ0  
±0.±  
±0.±  
20.2  
±6.2  
20.2  
100  
9.9  
9.9  
±9.8  
±ꢀ.8  
±9.8  
±0  
±0  
20  
±6  
20  
±ꢀ0  
±0.±  
±0.±  
20.2  
±6.2  
20.2  
100  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
ppm/°C  
Pin 7 to Pin ꢀ (0 V to ꢀ V FS Range)  
Pin 8 to Pin ꢀ (0 V to ±0 V FS Range)  
Pin 9 to Pin ꢀ (0 V to 8 V FS Range)  
Pin ±0 to Pin ꢀ (Auxiliary Input)  
Temperature Coefficient (All)  
INTEGRATOR OP AMP  
Input Bias Current  
Inverting Input (Pin ꢀ)  
Noninverting Input (Pin 6)  
Input Offset Current  
Input Offset Current Drift  
Input Offset Voltage  
±ꢀ  
20  
20  
±
±±  
±±0  
86  
±ꢀ  
20  
20  
±
±±  
±±0  
86  
nA  
nA  
nA  
nA/°C  
mV  
µV/°C  
dB  
20  
50  
70  
3
3
±2ꢀ  
20  
50  
70  
2
2
±±ꢀ  
Input Offset Voltage Drift  
Open-Loop Gain  
Common-Mode Input Range  
CMRR  
–VS + ꢀ  
80  
+VS – ꢀ  
–VS + ꢀ  
80  
+VS – ꢀ  
V
dB  
Bandwidth  
Output Voltage Range  
(Referred to Pin 6, R± > = ꢀ kΩ)  
±4  
−1  
9ꢀ  
±4  
9ꢀ  
(+VS − 4)  
MHz  
V
(+VS − 4)  
−1  
Rev. C | Page 3 of 28