AD7870/AD7875/AD7876
P IN FUNCTIO N D ESCRIP TIO N
D IP
P in
P in No. Mnem onic
Function
1
2
3
RD
BUSY/INT
CLK
Read. Active low logic input. T his input is used in conjunction with CS low to enable the data outputs.
Busy/Interrupt, Active low logic output indicating converter status. See timing diagrams.
Clock input. An external T T L-compatible clock may be applied to this input pin. Alternatively, tying this pin to
VSS enables the internal laser-trimmed clock oscillator.
4
DB11/HBEN Data Bit 11 (MSB)/High Byte Enable. T he function of this pin is dependent on the state of the 12/8/CLK input (see
below). When 12-bit parallel data is selected, this pin provides the DB11 output. When byte data is selected, this pin
becomes the HBEN logic input HBEN is used for 8-bit bus interfacing. When HBEN is low, DB7/LOW to DB0/DB8
become DB7 to DB0. With HBEN high, DB7/LOW to DB0/DB8 are used for the upper byte of data (see T able I).
5
6
DB10/SSTRB Data Bit 10/Serial Strobe. When 12-bit parallel data is selected, this pin provides the DB10 output. SSTRB is an
active low open-drain output that provides a strobe or framing pulse for serial data. An external 4.7 kΩ pull-up
resistor is required on SSTRB.
DB9/SCLK
Data Bit 9/Serial Clock. When 12-bit parallel data is selected, this pin provides the DB9 output. SCLK is the gated
serial clock output derived from the internal or external ADC clock. If the 12/8/CLK input is at –5 V, then SCLK
runs continuously. If 12/8/CLK is at 0 V, then SCLK is gated off after serial transmission is complete. SCLK is an
open-drain output and requires an external 2 kΩ pull-up resistor.
7
DB8/SDAT A Data Bit 8/Serial Data. When 12-bit parallel data is selected, this pin provides the DB8 output. SDAT A is an open-
drain serial data output which is used with SCLK and SSTRB for serial data transfer. Serial data is valid on the fall-
ing edge of SCLK while SSTRB is low. An external 4.7 kΩ pull-up resistor is required on SDAT A.
8–11
DB7/LOW–
DB4/LOW
T hree-state data outputs controlled by CS and RD. T heir function depends on the 12/8/CLK and HBEN inputs.
With 12/8/CLK high, they are always DB7–DB4. With 12/8/CLK low or –5 V, their function is controlled by HBEN
(see T able I).
12
DGND
Digital Ground. Ground reference for digital circuitry.
13–16
DB3/DB11–
DB0/DB8
T hree-state data outputs which are controlled by CS and RD. T heir function depends on the 12/8/CLK and HBEN
inputs. With 12/8/CLK high, they are always DB3–DB0. With 12/8/CLK low or –5 V, their function is controlled by
HBEN (see T able I).
Table I. O utput D ata for Byte Inter facing
HBEN
HIGH
LOW
DB7/LOW DB6/LOW DB5/LOW DB4/LOW DB3/DB11
DB2/DB10 DB1/DB9 DB0/DB8
LOW
DB7
LOW
DB6
LOW
DB5
LOW
DB4
DB11(MSB)
DB3
DB10
DB2
DB9
DB1
DB8
DB0 (LSB)
17
18
19
20
21
22
VDD
Positive Supply, +5 V ± 5%.
Analog Ground. Ground reference for track/hold, reference and DAC.
AGND
REF OUT
VIN
Voltage Reference Output. T he internal 3 V reference is provided at this pin. T he external load capability is 500 µA.
Analog Input. T he analog input range is ±3 V for the AD7870, ±10 V for the AD7876 and 0 V to +5 V for the AD7875.
Negative Supply, –5 V ± 5%.
VSS
12/8/CLK
T hree Function Input. Defines the data format and serial clock format. With this pin at +5 V, the output data for-
mat is 12-bit parallel only. With this pin at 0 V, either byte or serial data is available and SCLK is not continuous.
With this pin at –5 V, either byte or serial data is again available but SCLK is now continuous.
23
24
CONVST
CS
Convert Start. A low to high transition on this input puts the track/hold into its hold mode and starts conversion.
T his input is asynchronous to the CLK input.
Chip Select. Active low logic input. T he device is selected when this input is active. With CONVST tied low, a new
conversion is initiated when CS goes low.
P IN CO NFIGURATIO NS1
D IP and SO IC 2
P LCC 2
1PIN CONFIGURATIONS ARE THE SAME FOR
THE AD7875 AND AD7876.
2THE AD7870 AND AD7875 ARE AVAILABLE IN
DIP AND PLCC; THE AD7870A IS AVAILABLE IN
PLASTIC DIP; THE AD7875 AND AD7876 ARE
AVAILABLE IN SOIC AND DIP.
REV. B
–6–
ADI [ ADI ]
