AD7870/AD7875/AD7876
AD 7875/AD 7876
P aram eter
K, B1
L, C1
T1
Units
Test Conditions/Com m ents
DC ACCURACY
Resolution
12
12
12
Bits
Minimum Resolution for Which
No Missing Codes Are Guaranteed
Integral Nonlinearity @ +25°C
T MIN to T MAX (AD7875 Only)
T MIN to T MAX (AD7876 Only)
Differential Nonlinearity
Unipolar Offset Error (AD7875 Only)
Bipolar Zero Error (AD7876 Only)
Full-Scale Error at +25°C2
Full-Scale T C2
12
±1
±1
±1
±1
±5
±6
±8
±60
2
12
±1/2
±1
±1/2
±1
±5
±2
±8
±35
2
12
±1
±1
±1
Bits
LSB max
LSB max
LSB max
±1.5/–1.0 LSB max
±5
±6
±8
±60
2
LSB max
LSB max
LSB max
ppm/°C max
µs max
T ypical Full-Scale Error Is ±1 LSB
T ypical T C is ±20 ppm/°C
T rack/Hold Acquisition T ime
DYNAMIC PERFORMANCE3 (AD7875 ONLY)
Signal-to-Noise Ratio4 (SNR)
@ +25°C
T MIN to T MAX
T otal Harmonic Distortion (T HD)
70
70
–80
72
71
–80
69
69
–78
dB min
dB min
dB max
VIN = 10 kHz Sine Wave, fSAMPLE = 100 kHz
T ypically 71.5 dB for 0 < VIN < 50 kHz
VIN = 10 kHz Sine Wave, fSAMPLE = 100 kHz
T ypically –86 dB for 0 < VIN < 50 kHz
VIN = 10 kHz, fSAMPLE = 100 kHz
Peak Harmonic or Spurious Noise
–80
–80
–78
dB max
T ypically –86 dB for 0 < VIN < 50 kHz
Intermodulation Distortion (IMD)
Second Order T erms
T hird Order T erms
–80
–80
–80
–80
–78
–78
dB max
dB max
fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 50 kHz
fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 50 kHz
ANALOG INPUT
AD7875 Input Voltage Range
AD7875 Input Current
AD7876 Input Voltage Range
AD7876 Input Current
0 to +5 0 to +5 0 to +5
Volts
µA max
Volts
500
500
500
±10
±600
±10
±600
±10
±600
µA max
REFERENCE OUT PUT
REF OUT @ +25°C
2.99
3.01
±60
–1
2.99
3.01
±35
–1
2.99
3.01
±60
–1
V min
V max
ppm/°C max
mV max
REF OUT T empco
Reference Load Sensitivity (∆REF OUT /∆I)
T ypical T empco Is ±20 ppm/°C
Reference Load Current Change (0 µA–500 µA)
Reference Load Should Not Be Changed
During Conversion.
LOGIC INPUT S
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
2.4
0.8
±10
±10
10
2.4
0.8
±10
±10
10
2.4
0.8
±10
±10
10
V min
VDD = 5 V ± 5%
VDD = 5 V ± 5%
VIN = 0 V to VDD
VIN = VSS to VDD
V max
µA max
µA max
pF max
Input Current (12/8/CLK Input Only)
5
Input Capacitance, CIN
LOGIC OUT PUT S
Output High Voltage, VOH
Output Low Voltage, VOL
DB11–DB0
4.0
0.4
4.0
0.4
4.0
0.4
V min
V max
ISOURCE = 40 µA
ISINK = 1.6 mA
Floating-State Leakage Current
Floating-State Output Capacitance5
10
15
10
15
10
15
µA max
pF max
CONVERSION T IME
External Clock (fCLK = 2.5 MHz)
Internal Clock
8
7/9
8
7/9
8
7/9
µs max
µs min/µs max
POWER REQUIREMENT S
NOT ES
As per AD7870
1T emperature ranges are as follows: AD7875: K, L Versions, 0 °C to +70°C; B, C Versions, –40°C to +85°C; T Version, –55°C to +125°C. AD7876: B, C Versions,
–40°C to +85°C; T Version, –55°C to +125°C.
2Includes internal reference error and is calculated after unipolar offset error (AD7875) or bipolar zero error (AD7876) has been adjusted out.
Full-scale error refers to both positive and negative full-scale error for the AD7876.
3Dynamic performance parameters are not tested on the AD7876 but these are typically the same as for the AD7875.
4SNR calculation includes distortion and noise components.
5Sample tested @ +25°C to ensure compliance.
Specifications subject to change without notice.
REV. B
–3–
ADI [ ADI ]
