AD7824/AD7828
OPERATIONAL DIAGRAM
APPLYING THE AD7824/AD7828
The AD7824 is a 4-channel 8-bit ADC and the AD7828 is an
8-channel 8-bit ADC. Operational diagrams for both of these
devices are shown in Figures 3 and 4. The addition of just a 5 V
reference allows the devices to perform the analog-to-digital function.
REFERENCE AND INPUT
The two reference inputs on the AD7824/AD7828 are fully differ-
ential and define the zero to full-scale input range of the ADC.
As a result, the span of the analog input voltage for all channels
can easily be varied. By reducing the reference span, VREF (+) to
VREF (–), to less than 5 V, the sensitivity of the converter can be
increased (e.g., if VREF = 2 V then 1 LSB = 7.8 mV). The input/
reference arrangement also facilitates ratiometric operation.
AIN4
AIN3
AIN2
AIN1
NC
1
2
24
23
22
21
20
19
18
17
16
15
14
13
5V
V
DD
NC
A0
ANALOG INPUTS
0V TO 5V
3
P ADDRESS
BUS
This reference flexibility also allows the input channel voltage
span to be offset from zero. The voltage at VREF (–) sets the
input level for all channels, which produces a digital output of
all zeroes. Therefore, although the analog inputs are not them-
selves differential, they have nearly differential input capability
in most measurement applications because of the reference
design. Figures 5 to 7 show some of the configurations that are
possible.
4
A1
AD7824
5
DB7
DB6
DB5
DB4
DB0
DB1
DB2
DB3
6
P 4MSB
DATA BUS
7
P 4LSB
DATA BUS
8
P CONTROL INPUT
9
CS
10
11
12
RD
RDY
P CONTROL INPUT
STATUS OUTPUT
5V
V
(+)
(–)
STATUS OUTPUT
INT
GND
REF
V
REF
V
(+)
(–)
AIN1
GND
NC = NO CONNECT
IN
AD7824*
AD7828*
V
IN
Figure 3. AD7824 Operational Diagram
5V
V
DD
0.1F
47F
V
(+)
REF
1
2
AIN6
AIN5
AIN4
AIN3
AIN2
AIN1
NC
AIN7 28
AIN8 27
ANALOG INPUTS
0V TO 5V
V
(–)
REF
5V
3
V
DD
26
ANALOG INPUTS
0V TO 5V
4
A0 25
A1 24
*ADDITIONAL PINS OMITTED FOR CLARITY.
ONLY CHANNEL 1 SHOWN.
P ADDRESS
BUS
5
6
A2 23
Figure 5. Power Supply as Reference
AD7828
7
DB7 22
DB6 21
DB5 20
DB4 19
8
DB0
DB1
DB2
DB3
RD
P 4MSB
DATA BUS
V
(+)
(–)
AIN1
GND
IN
9
P 4LSB
DATA BUS
AD7824*
AD7828*
10
11
12
13
14
V
IN
P CONTROL INPUT
STATUS OUTPUT
5V
18
CS
5V
V
DD
P CONTROL INPUT
RDY 17
(+) 16
0.1F
47F
AD580
V
(+)
REF
STATUS OUTPUT
V
V
INT
REF
0.1F
10F
V
(–)
REF
GND
(–) 15
REF
NC = NO CONNECT
*ADDITIONAL PINS OMITTED FOR CLARITY.
ONLY CHANNEL 1 SHOWN.
Figure 4. AD7828 Operational Diagram
CIRCUIT INFORMATION
Figure 6. External Reference Using the AD580, Full-Scale
Input is 2.5 V
BASIC DESCRIPTION
The AD7824/AD7828 uses a half-flash conversion technique
whereby two 4-bit flash ADCs are used to achieve an 8-bit result.
Each 4-bit flash ADC contains 15 comparators that compare
the unknown input to a reference ladder to get a 4-bit result.
For a full 8-bit reading to be realized, the upper 4-bit flash, the
most significant (MS) flash, performs a conversion to provide
the four most significant data bits. An internal DAC, driven by
the four MSBs, then recreates an analog approximation of the
input voltage. This analog result is subtracted from the input,
and the difference is converted by the lower flash ADC, the least
significant (LS) flash, to provide the four least significant bits of
the output data. The most significant flash ADC also has one
additional comparator to detect overrange on the analog input.
V
(+)
AIN1
GND
IN
AD7824*
AD7828*
5V
V
DD
DB7
0.1F
47F
V1
V2
V
(+)
(–)
REF
DATA
DB0
V
REF
*ADDITIONAL PINS OMITTED FOR CLARITY.
ONLY CHANNEL 1 SHOWN.
V
(+)
IN
V1 –V2
DATA =
Figure 7. Input Not Referenced to GND
–6–
REV. F
ADI [ ADI ]
