欢迎访问ic37.com |
会员登录 免费注册
发布采购

5962-8850501RA 参数 Datasheet PDF下载

5962-8850501RA图片预览
型号: 5962-8850501RA
PDF下载: 下载PDF文件 查看货源
内容描述: 10位A / D转换器 [10-Bit A/D Converter]
分类和应用: 转换器模数转换器
文件页数/大小: 10 页 / 593 K
品牌: ADI [ ADI ]
 浏览型号5962-8850501RA的Datasheet PDF文件第1页浏览型号5962-8850501RA的Datasheet PDF文件第2页浏览型号5962-8850501RA的Datasheet PDF文件第4页浏览型号5962-8850501RA的Datasheet PDF文件第5页浏览型号5962-8850501RA的Datasheet PDF文件第6页浏览型号5962-8850501RA的Datasheet PDF文件第7页浏览型号5962-8850501RA的Datasheet PDF文件第8页浏览型号5962-8850501RA的Datasheet PDF文件第9页  
AD573  
ABSOLUTE MAXIMUM RATINGS  
V+ to Digital Common . . . . . . . . . . . . . . . . . . . . . 0 V to +7 V  
V– to Digital Common . . . . . . . . . . . . . . . . . . . 0 V to –16.5 V  
Analog Common to Digital Common . . . . . . . . . . . . . . . ±1 V  
Analog Input to Analog Common . . . . . . . . . . . . . . . . . ±15 V  
Control Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V+  
Digital Outputs (High Impedance State) . . . . . . . . . . 0 V to V+  
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800 mW  
DIGITAL  
COMMON  
FUNCTIONAL DESCRIPTION  
V+  
5k  
V–  
CONVERT  
A block diagram of the AD573 is shown in Figure 1. The posi-  
tive CONVERT pulse must be at least 500 ns wide. DR goes  
high within 1.5 µs after the leading edge of the convert pulse  
indicating that the internal logic has been reset. The negative  
edge of the CONVERT pulse initiates the conversion. The in-  
ternal 10-bit current output DAC is sequenced by the integrated  
injection logic (I2L) successive approximation register (SAR)  
from its most significant bit to least significant bit to provide an  
output current which accurately balances the input signal cur-  
rent through the 5 kresistor. The comparator determines  
whether the addition of each successively weighted bit current  
causes the DAC current sum to be greater or less than the input  
current; if the sum is more, the bit is turned off. After testing all  
bits, the SAR contains a 10-bit binary code which accurately  
represents the input signal to within 1/2 LSB (0.05% of full scale).  
MSB  
DB9  
ANALOG  
IN  
DB8  
DB7  
DB6  
ANALOG  
COMMON  
10-BIT  
10-BIT  
SAR  
CURRENT  
OUTPUT  
DAC  
HIGH  
BYTE  
DB5  
DB4  
DB3  
DB2  
COMP-  
ARATOR  
INT  
CLOCK  
BIPOLAR  
OFFSET  
CONTROL  
DB1  
DB0  
LOW  
BYTE  
LSB  
HBE  
LBE  
BURIED ZENER REF  
DATA  
READY  
AD573  
The SAR drives DR low to indicate that the conversion is com-  
plete and that the data is available to the output buffers. HBE  
and LBE can then be activated to enable the upper 8-bit and  
lower 2-bit buffers as desired. HBE and LBE should be brought  
high prior to the next conversion to place the output buffers in  
the high impedance state.  
Figure 1. Functional Block Diagram  
UNIPOLAR CONNECTION  
The AD573 contains all the active components required to per-  
form a complete A/D conversion. Thus, for many applications,  
all that is necessary is connection of the power supplies (+5 V  
and –12 V to –15 V), the analog input and the convert pulse.  
However, there are some features and special connections which  
should be considered for achieving optimum performance. The  
functional pinout is shown in Figure 2.  
The temperature compensated buried Zener reference provides  
the primary voltage reference to the DAC and ensures excellent  
stability with both time and temperature. The bipolar offset in-  
put controls a switch which allows the positive bipolar offset  
current (exactly equal to the value of the MSB less 1/2 LSB) to  
be injected into the summing (+) node of the comparator to  
offset the DAC output. Thus the nominal 0 V to +10 V unipolar  
input range becomes a –5 V to +5 V range. The 5 kthin-film  
input resistor is trimmed so that with a full-scale input signal, an  
input current will be generated which exactly matches the DAC  
output with all bits on.  
The standard unipolar 0 V to +10 V range is obtained by short-  
ing the bipolar offset control pin (Pin 16) to digital common  
(Pin 17).  
REV. B  
–3–