AD578/AD579
Table II. AD579 Digital Output Codes vs. Analog Input for Unipolar and Bipolar Ranges
Digital Output Code
(Binary for Unipolar Ranges;
Analog Input—Volts
(Center of Quantization Interval)
Offset Binary for Bipolar Ranges)
0 V to +10 V
Range
0 V to +20 V
Range
–5 V to +5 V
Range
–10 V to +10 V
Range
B1
(MSB)
B12
(LSB)
+9.9902
+9.9804
+19.9804
+19.9609
+4.9902
+4.9804
+9.9804
+9.9609
1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 0
∑
∑
∑
∑
∑
∑
∑
+10.0195
+10.0000
∑
∑
∑
∑
+5.0097
+5.0000
∑
+0.0097
+0.0000
∑
+0.0195
+0.0000
∑
1 0 0 0 0 0 0 0 0 0 0 1
1 0 0 0 0 0 0 0 0 0 0 0
∑
∑
∑
∑
∑
∑
+0.0097
+0.0000
+0.0195
+0.0000
–4.9902
–5.0000
–9.9804
–10.0000
0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0
BIPOLAR OPERATION
LAYOUT CONSIDERATIONS
The connections for bipolar ranges are shown in Figure 4. Again,
as for the unipolar ranges, if the offset and gain specifications
are sufficient, the 100 W trimmer shown can be replaced by a
50 W ± 1% fixed resistor. The analog input is applied as for the
unipolar ranges. Bipolar calibration is similar to unipolar calibra-
tion. First, a signal 1/2 LSB above negative full scale is applied,
and R1 is trimmed to give the first transition (0000 0000 0000
to 0000 0000 0001). A signal 1 1/2 LSB below positive full
scale is applied and R2 trimmed to give the last transition
(1111 1111 1110 to 1111 1111 1111).
Many data acquisition components have two or more ground pins
that are not connected together within the device. These grounds
are usually referred to as the logic power return, analog com-
mon (analog power return), and analog signal ground. These
grounds must be tied together at one point, usually at the system
power supply ground. Ideally, a single solid ground would be
desirable. However, since current flows through the ground
wires and etch stripes of the circuit cards, and since these paths
have resistance and inductance, hundreds of millivolts can be
generated between the system ground point and the ground pin
of the AD578 or AD579. Separate ground returns should be
provided to minimize the current flow in the path from sensitive
points to the system ground point. In this way, supply currents
and logic-gate return currents are not summed into the same
return path as analog signals, where they would cause measure-
ment errors.
ZERO ADJ
؎10V
20V IN
ANALOG INPUTS
BITS 1–12 (AD578)
10V IN
BITS 1–10 (AD579)
–15V
؎5V
+5V
0.1F
0.1F
0.1F
10F
AD578/AD579
+
+
ANALOG
COMMON
BIP OFF
R1
10F
DIG
COM
100⍀
10F
+
CLK OUT
CLK IN
REF IN
+15V
R2
100⍀
REF OUT
Figure 5. Basic Bypassing Practice
+
6.8F
Each of the AD578 or AD579 supply terminals should be capaci-
tively decoupled as close to the ADC as possible. A large value
capacitor such as 10 mF in parallel with a 0.1 mF capacitor is
usually sufficient. Analog supplies are bypassed to the analog
power return pin and the logic supply is bypassed to the digital
GND pin.
DIG GND
ANA GND
Figure 4. Bipolar Input Connections
To minimize noise, the reference output (Pin 24) should be
decoupled by a 6.8 mF capacitor to Pin 30.
REV. C
–8–
ADI [ ADI ]
