PAC5225
Power Application Controller
14. MEMORY SYSTEM
14.1. Features
32kB embedded FLASH
100,000 program/erase cycles
10 years data retention
8kB SRAM
14.2. Block Diagram
Figure 14-1. Memory System
MEMORY SYSTEM
INFO ROM
FLASH
SRAM
256B INFO
ROM
1kB FLASH
PAGES
8kB
SRAM
14.3. Functional Description
The device has multiple banks of embedded FLASH memory, SRAM memory, as well as peripheral control registers that
are all program-accessible in a flat memory map.
14.3.1. Program and Data FLASH
32kB in 32 pages of 1kB each is available for program or data memory. Each of them can be individually erased or written
to while the microcontroller is executing a program from SRAM.
14.3.2. SRAM
Up to 8kB contiguous array of SRAM is available for non-persistent data storage. The SRAM memory supports word
(4-byte), half-word (2-byte) and byte address aligned access. The microcontroller may execute code out of SRAM for time-
critical applications, or when modifying the contents of FLASH memory.
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Rev 2.0‒September 22, 2017