ACT8892
Rev 2, 01-Jul-15
REGISTER AND BIT DESCRIPTIONS CONT’D
OUTPUT ADDRESS BIT
NAME
ACCESS
DESCRIPTION
Output Discharge Control. When activated, discharges LDO
output to GA through 1.5kΩ when in shutdown. Set bit to 1 to
enable output voltage discharge in shutdown, clear bit to 0 to
disable this function.
REG7
0x65
[6]
DIS
R/W
LDO Low-IQ Mode Control. Set bit to 1 for low-power
operating mode, clear bit to 0 for normal mode.
REG7
REG7
REG7
REG7
0x65
0x65
0x65
0x65
[5]
[4:2]
[1]
LOWIQ
DELAY
nFLTMSK
OK
R/W
R/W
R/W
R/W
Regulator Turn-On Delay Control. See the REG4, REG5,
REG6, REG7 Turn-on Delay section for more information.
Regulator Fault Mask Control. Set bit to 1 enable to fault-
interrupts, clear bit to 0 to disable fault-interrupts.
Regulator Power-OK Status. Value is 1 when output voltage
exceeds the power-OK threshold, value is 0 otherwise.
[0]
Innovative PowerTM
- 13 -
www.active-semi.com
ActivePMUTM is a trademark of Active-Semi.
Copyright © 2015-2017 Active-Semi, Inc.
I2CTM is a trademark of NXP.
ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
