ACT81460
Rev 1.0, 18-Dec-2018
LDO Output Voltage (V)
LDOx_VSET [5:3]
LOW-DROPOUT LINEAR
REGULATORS
000
001
010
011
100
101
110
111
General Description
0.60
1.00
1.40
1.80
2.20
2.60
3.00
3.40
000
001
010
011
100
101
110
111
ACT81460 contains three fully integrated, 100mA, low-
noise, low-dropout linear regulators (LDOs). Each LDO
has been optimized to achieve low quiescent current
under no load conditions. LDO3 can also be configured
in load switch mode to behave like a load switch.
0.65
0.70
0.75
0.80
0.85
0.90
0.95
1.05
1.10
1.15
1.20
1.25
1.30
1.35
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.85
1.90
1.95
2.00
2.05
2.10
2.15
2.25
2.30
2.35
2.40
2.45
2.50
2.55
2.65
2.70
2.75
2.80
2.85
2.90
2.95
3.05
3.10
3.15
3.20
3.25
3.30
3.35
3.45
3.50
3.55
3.60
3.60
3.60
3.60
The LDOs require only two small external components
(Cin, Cout) for operation. They ship with default output
voltages that can be modified via the I2C interface for
systems that require advanced power management
functions.
Table 5. Vout vs LDOx_VSET Register Setting
Soft-Start
Each LDO contains a softstart circuit that limits the rate
of change of the output voltage, minimizing input inrush
current and ensuring that the outputs power up mono-
tonically. This circuitry is effective any time the LDO is
enabled, as well as after responding to a short circuit or
other fault condition. The LDO ramp rate is fixed at
1.7V/ms.
Enable / Disable Control
During normal operation, each LDO may be enabled or
disabled via the I2C interface by writing to that regula-
tor's ON bit. Note that disabling an LDO that is used as
an input trigger to another regulator may or may not dis-
able the other regulators following it, depending on the
specific CMI settings. Each LDO has a load discharge
function designed to quickly pull the output voltage to
ground when the LDO is disabled. The circuit connects
an internal resistor (50ohm) from the output to AGND
when the LDO is disabled.
Output Voltage Setting
The LDOs regulate to the voltage defined by their I2C
registers LDO1_VSET, LDO2_VSET, and LDO3_VSET.
The LDOs do not have a second VSET register like the
buck converters. They can be programmed between
0.6V and 3.6V in 50mV steps. The following equation
calculates the output voltage based on the LDOx_VSET
register setting.
POK and Output Fault Interrupt
Each LDO features a power-OK status bit that can be
read by the system microprocessor via the I2C interface.
If an output voltage is lower than the Power-OK (POK)
threshold, typically 8% below the programmed
regulation voltage, the value of that regulator's POK bit
will be 0.
VLDOx = 0.6V + LDOx_VSET * 0.050V
Where LDOx_VSET is the decimal equivalent of the
value in each regulator’s I2C LDOx_VSET register.
These registers contain an unsigned 6-bit binary value.
As an example, if LDO1’s LDO1_VSET register con-
tains 11000b (24 decimal), the output voltage is 1.8V.
If a LDO's nFLTMSK bit is set to 1, the ACT81460 will
interrupt the processor if that LDO's output voltage falls
below the Power-OK (POK) threshold. In this case,
nIRQ will assert low and remain asserted until either the
regulator is turned off or back in regulation, and the POK
bit has been read via I2C. After removing the under-
voltage condition, a read operation clears the interrupt.
Active Semi recommends that the LDO’s output voltage
be kept within +/- 25% of the default output voltage to
maintain accuracy. Voltage changes larger than +/- 25%
may require different factory trim settings (new CMI) to
maintain accuracy.
Overcurrent and Short Circuit Protection
Each LDO provides overcurrent detection and short cir-
cuit protection featuring a current-limit foldback function.
When current limit is reached, the IC can either shut the
output off or limit the output current until the overload
condition is removed. This is controlled by I2C bits
LDOx_ILIM_SHUTDOWN_DIS.
Table 5 shows the output voltage in voltage as a func-
tion of the LDOx_VSET register settings.
The overcurrent threshold is fixed at 120mA. In both an
overload and a short circuit condition, the LDO limits the
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