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OTB25LPLL 参数 Datasheet PDF下载

OTB25LPLL图片预览
型号: OTB25LPLL
PDF下载: 下载PDF文件 查看货源
内容描述: 超快速的本地和长途线网络 [Ultra-Fast Local and Long-Line Network]
分类和应用:
文件页数/大小: 174 页 / 1510 K
品牌: ACTEL [ Actel Corporation ]
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PLUS  
ProASIC  
Flash Family FPGAs  
V
Programming Supply Pin  
finite length conductors that distribute the power to the  
device. This can be accomplished by providing sufficient  
bypass capacitance between the VPP and VPN pins and  
GND (using the shortest paths possible). Without  
sufficient bypass capacitance to counteract the  
inductance, the VPP and VPN pins may incur a voltage  
spike beyond the voltage that the device can withstand.  
This issue applies to all programming configurations.  
PP  
This pin may be connected to any voltage between GND  
and 16.5 V during normal operation, or it can be left  
unconnected.2 For information on using this pin during  
programming,  
ProASICPLUS Devices application note. Actel recommends  
floating the pin or connecting it to VDDP  
see  
the  
In-System Programming  
.
V
Programming Supply Pin  
PN  
The solution prevents spikes from damaging the  
ProASICPLUS devices. Bypass capacitors are required for  
the VPP and VPN pads. Use a 0.01 µF to 0.1 µF ceramic  
capacitor with a 25 V or greater rating. To filter low-  
frequency noise (decoupling), use a 4.7 µF (low ESR, <1  
<, tantalum, 25 V or greater rating) capacitor. The  
capacitors should be located as close to the device pins as  
possible (within 2.5 cm is desirable). The smaller, high-  
frequency capacitor should be placed closer to the device  
pins than the larger low-frequency capacitor. The same  
dual-capacitor circuit should be used on both the VPP and  
VPN pins (Figure 1-49).  
This pin may be connected to any voltage between 0.5V  
and –13.8 V during normal operation, or it can be left  
unconnected.3 For information on using this pin during  
programming,  
see  
the  
In-System Programming  
ProASICPLUS Devices application note. Actel recommends  
floating the pin or connecting it to GND.  
Recommended Design Practice  
for V /V  
PN PP  
PLUS  
PLUS  
ProASIC  
Devices – APA450, APA600,  
ProASIC  
APA300  
Devices – APA075, APA150,  
APA750, APA1000  
Bypass capacitors are required from VPP to GND and VPN  
to GND for all ProASICPLUS devices during programming.  
During the erase cycle, ProASICPLUS devices may have  
current surges on the VPP and VPN power supplies. The  
only way to maintain the integrity of the power  
distribution to the ProASICPLUS device during these  
current surges is to counteract the inductance of the  
These devices do not require bypass capacitors on the VPP  
and VPN pins as long as the total combined distance of  
the programming cable and the trace length on the  
board is less than or equal to 30 inches. Note: For trace  
lengths greater than 30 inches, use the bypass capacitor  
recommendations in the previous section.  
2.5cm  
_
+
V
PP  
0.1µF  
+
+
to  
4.7µF  
4.7µF  
Programming  
Header  
or  
Actel  
ProASIC  
Device  
0.01µF  
PLUS  
Supplies  
_
+
V
PN  
0.1µF  
to  
0.01µF  
Figure 1-49 ProASICPLUS VPP and VPN Capacitor Requirements  
2. There is a nominal 40 kpull-up resistor on VPP.  
3. There is a nominal 40 kpull-down resistor on VPN  
.
1-74  
v5.2  
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