PLUS
ProASIC
Flash Family FPGAs
Logic-Tile Contribution—P
logic
Plogic, the logic-tile component of AC power dissipation, is given by
Plogic = P3 * mc * Fs
where:
P3
=
1.4 µW/MHz is the average power consumption of a logic tile per MHz of its output toggling rate. The
maximum output toggling rate is Fs/2.
mc
Fs
=
=
the number of logic tiles switching during each Fs cycle
the clock frequency
I/O Output Buffer Contribution—P
outputs
Poutputs, the I/O component of AC power dissipation, is given by
Poutputs = (P4 + (Cload * VDDP2)) * p * Fp
where:
P4
=
326 µW/MHz is the intrinsic power consumption of an output pad normalized per MHz of the output
frequency. This is the total I/O current VDDP
.
Cload
p
Fp
=
=
=
the output load
the number of outputs
the average output frequency
I/O Input Buffer's Buffer Contribution—P
inputs
The input’s component of AC power dissipation is given by
Pinputs = P8 * q * Fq
where:
P8
=
29 µW/MHz is the intrinsic power consumption of an input pad normalized per MHz of the input
frequency.
q
=
=
the number of inputs
Fq
the average input frequency
PLL Contribution—P
pll
Ppll = P9 * Npll
where:
P9
=
=
7.5 mW. This value has been estimated at maximum PLL clock frequency.
number of PLLs used
NPll
RAM Contribution—P
memory
Finally, Pmemory, the memory component of AC power consumption, is given by
Pmemory = P6 * Nmemory * Fmemory * Ememory
where:
P6
Nmemory
=
=
175 µW/MHz is the average power consumption of a memory block per MHz of the clock
the number of RAM/FIFO blocks
(1 block = 256 words * 9 bits)
Fmemory
Ememory
=
=
the clock frequency of the memory
the average number of active blocks divided by the total number of blocks (N) of the memory.
•
Typical values for Ememory would be 1/4 for a 1k x 8,9,16, 32 memory and 1/16 for a 4kx8,
9, 16, and 32 memory configuration
•
In addition, an application-dependent component to Ememory can be considered. For
example, for a 1kx8 memory configuration using only 1 cycle out of 2, Ememory = 1/4*1/2 = 1/8
v5.2
1-31
ACTEL [ Actel Corporation ]
