PLUS
ProASIC
Flash Family FPGAs
Logic Tile Timing Characteristics
Timing Derating
Timing characteristics for ProASICPLUS devices fall into
three categories: family dependent, device dependent,
and design dependent. The input and output buffer
characteristics are common to all ProASICPLUS family
members. Internal routing delays are device dependent.
Design dependency means that actual delays are not
determined until after placement and routing of the
user’s design are complete. Delay values may then be
determined by using the Timer utility or by performing
simulation with post-layout delays.
Since ProASICPLUS devices are manufactured with a
CMOS process, device performance will vary with
temperature, voltage, and process. Minimum timing
parameters reflect maximum operating voltage,
minimum operating temperature, and optimal process
variations. Maximum timing parameters reflect minimum
operating voltage, maximum operating temperature,
and worst-case process variations (within process
specifications). The derating factors shown in Table 1-9
should be applied to all timing data contained within
this datasheet.
All timing numbers listed in this datasheet represent
sample timing characteristics of ProASICPLUS devices.
Actual timing delay values are design-specific and can be
derived from the Timer tool in Actel’s Designer software
after place-and-route.
Critical Nets and Typical Nets
Propagation delays are expressed only for typical nets,
which are used for initial design performance evaluation.
Critical net delays can then be applied to the most
timing-critical paths. Critical nets are determined by net
property assignment prior to place-and-route. Refer to
the Actel Designer User’s Guide or online help for details
on using constraints.
Table 1-9 • Temperature and Voltage Derating Factors
(Normalized to Worst-Case Commercial, TJ = 70°C, VDD = 2.3 V)
–55°C
0.84
–40°C
0.86
0°C
0.91
0.87
0.83
25°C
0.94
0.90
0.86
70°C
1.00
0.95
0.91
85°C
1.02
0.98
0.93
110°C
1.05
125°C
1.13
135°C
1.18
150°C
1.27
2.3 V
2.5 V
2.7 V
Notes:
0.81
0.82
1.01
1.09
1.13
1.21
0.77
0.79
0.96
1.04
1.08
1.16
1. The user can set the junction temperature in Designer software to be any integer value in the range of –55°C to 175°C.
2. The user can set the core voltage in Designer software to be any value between 1.4 V and 1.6 V.
1-20
v5.2
ACTEL [ Actel Corporation ]
