Actel Fusion Mixed-Signal FPGAs
FlashROM Characteristics
tSU
tSU
tSU
tHOLD
tHOLD
tHOLD
Address
A0
A1
tCK2Q
D0
tCK2Q
D1
tCK2Q
D0
Figure 2-45 • FlashROM Timing Diagram
Table 2-26 • FlashROM Access Time
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V
Parameter
tSU
Description
Address Setup Time
Address Hold Time
Clock to Out
–2
–1
Std.
0.71
Units
0.53
0.61
ns
ns
tHOLD
tCK2Q
FMAX
0.00
0.00
0.00
21.42
15.00
24.40
15.00
28.68
15.00
ns
Maximum Clock frequency
MHz
Preliminary v1.7
2-57