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AFS600-2FGG256I 参数 Datasheet PDF下载

AFS600-2FGG256I图片预览
型号: AFS600-2FGG256I
PDF下载: 下载PDF文件 查看货源
内容描述: Actel的Fusion混合信号FPGA [Actel Fusion Mixed-Signal FPGAs]
分类和应用:
文件页数/大小: 318 页 / 10484 K
品牌: ACTEL [ Actel Corporation ]
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Device Architecture  
Clocking Resources  
The Fusion family has a robust collection of clocking peripherals, as shown in the block diagram in  
Figure 2-16. These on-chip resources enable the creation, manipulation, and distribution of many  
clock signals. The Fusion integrated RC oscillator produces a 100 MHz clock source with no external  
components. For systems requiring more precise clock signals, the Actel Fusion family supports an  
on-chip crystal oscillator circuit. The integrated PLLs in each Fusion device can use the RC oscillator,  
crystal oscillator, or another on-chip clock signal as a source. These PLLs offer a variety of  
capabilities to modify the clock source (multiply, divide, synchronize, advance, or delay). Utilizing  
the CCC found in the popular Actel ProASIC3 family, Fusion incorporates six CCC blocks. The CCCs  
allow access to Fusion global and local clock distribution nets, as described in the "Global Resources  
(VersaNets)" section on page 2-10.  
Off-Chip On-Chip  
100 MHz  
RC Oscillator  
GNDOSC  
VCCOSC  
Clock Out to FPGA Core through CCC  
XTAL1  
GLINT  
Crystal Oscillator  
XTAL2  
To Core  
Xtal Clock  
PLL/ GLA  
NGMUX  
CCC  
External  
Crystal  
External  
RC  
Clock I/Os  
GLC  
or  
CLKOUT  
From FPGA Core  
Figure 2-16 • Fusion Clocking Options  
2-20  
Preliminary v1.7  
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