Actel Fusion Mixed-Signal FPGAs
Global Resource Characteristics
AFS600 VersaNet Topology
Clock delays are device-specific. Figure 2-15 is an example of a global tree used for clock
routing. The global tree presented in Figure 2-15 is driven by a CCC located on the west side
of the AFS600 device. It is used to drive all D-flip-flops in the device.
Central
Global Rib
CCC
VersaTile
Rows
Global Spine
Figure 2-15 • Example of Global Tree Use in an AFS600 Device for Clock Routing
Preliminary v1.7
2-17