Actel Fusion Mixed-Signal FPGAs
In Modes 1 to 3, the crystal oscillator is configured to support an external crystal or ceramic
resonator. These modes correspond to low, medium, and high gain. They differ in the crystal or
resonator frequency supported. The crystal or resonator is connected to the XTAL1 and XTAL2 pins.
Additionally, a capacitor is required on both XTAL1 and XTAL2 pins to ground (Figure 2-16 on
page 2-20). Table 2-10 on page 2-22 details each crystal oscillator mode, supported frequency
range, and recommended capacitor value.
A use model supported by the Fusion device involves powering down the core while the RTC
continues to run, clocked by the crystal oscillator. When powered down, the core cannot control
crystal oscillator mode pins. Also, some designers may wish to avoid the RTC altogether. To support
both situations, the crystal oscillator can be controlled by either the RTC or the FPGA core. If the
RTC is instantiated in the design, it will by default use RTCMODE[1:0] to set the crystal oscillator
control pins (the default). If the RTC is not used in the design, the FPGA core will set the crystal
oscillator control pins with MODE[1:0].
The crystal oscillator can be disabled/enabled by RTC or FPGA upon operation requirement. When
the crystal oscillator is disabled, XTL1 and XTL2 pins can be left floating.
Crystal Oscillator Characteristics
Table 2-11 • Electrical Characteristics of the Crystal Oscillator
Parameter
Description
Conditions
Using External Crystal
Using Ceramic Resonator
Using RC Network
Min.
0.032
0.5
Typ.
Max.
Units
MHz
MHz
MHz
%
FXTAL
Operating Frequency
20
8
0.032
4
Output Duty Cycle
Output Jitter
50
50
With 10 MHz Crystal
RC
ps RMS
mA
IDYNXTAL
Operating Current
0.6
0.19
0.6
0.6
10
0.032–0.2 MHz
0.2–2.0 MHz
2.0–20.0 MHz
mA
mA
mA
ISTBXTAL
Sleep Current
µA
PSRRXTAL
Power Supply Noise
Tolerance
0.5
Vp–p
VIHXTAL
VILXTAL
Input Logic Level HIGH
Input Logic Level LOW
90% of VCC
V
V
10% of VCC
Preliminary v1.7
2-23
ACTEL [ Actel Corporation ]
